GPIO_NXP_Arduino 1.1.0
GPIO device operation sample code for Arduino
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GPIO_NXP.h
1
8#ifndef ARDUINO_GPIO_NXP_ARD_H
9#define ARDUINO_GPIO_NXP_ARD_H
10
11#include <Arduino.h>
12#include <stdint.h>
13
14#include <I2C_device.h>
15
21enum access_word : uint8_t
22{
23 IN,
24 OUT,
25 POLARITY,
26 CONFIG,
27 DRIVE_STRENGTH,
28 LATCH,
29 PULL_UD_EN,
30 PULL_UD_SEL,
31 INT_MASK,
32 INT_STATUS,
33 OUTPUT_PORT_CONFIG,
34 NUM_access_word,
35};
36
44class GPIO_base : public I2C_device
45{
46public:
47 enum board {
48 NONE,
49 ARDUINO_SHIELD,
50 };
51
53 const int n_bits;
54
56 const int n_ports;
57
65 GPIO_base( uint8_t i2c_address, int nbits, const uint8_t* arp, uint8_t ai );
66
75 GPIO_base( TwoWire& wire, uint8_t i2c_address, int nbits, const uint8_t* arp, uint8_t ai );
76
78 virtual ~GPIO_base();
79
89 virtual void begin( board env = NONE );
90
99 virtual void output( int port, uint8_t value, uint8_t mask = 0 );
100
107 virtual void output( const uint8_t *vp );
108
116 virtual uint8_t input( int port );
117
125 virtual uint8_t* input( uint8_t *vp );
126
135 virtual void config( int port, uint8_t config, uint8_t mask = 0 );
136
143 virtual void config( const uint8_t* vp );
144
152 virtual void write_port( access_word w, const uint8_t* vp );
153
161 virtual void write_port16( access_word w, const uint16_t* vp );
162
171 virtual uint8_t* read_port( access_word w, uint8_t* vp );
172
181 virtual uint16_t* read_port16( access_word w, uint16_t* vp );
182
191 virtual void write_port( access_word w, uint8_t value, int port_num = 0 );
192
201 virtual void write_port16( access_word w, uint16_t value, int port_num = 0 );
202
211 virtual uint8_t read_port( access_word w, int port_num = 0 );
212
221 virtual uint16_t read_port16( access_word w, int port_num = 0 );
222
223 static void print_bin( uint8_t v );
224
225protected:
226 const uint8_t auto_increment;
227
228private:
229 const uint8_t* arp;
230 bool endian;
231
232 static constexpr int RESET_PIN = 8;
233 static constexpr int ADDR_PIN = 9;
234
235 void init( void );
236};
237
242class PCA9554 : public GPIO_base
243{
244public:
246 enum reg_num {
247 Input_Port,
248 Output_Port,
249 Polarity_Inversion,
250 Configuration,
251 };
252
257 PCA9554( uint8_t i2c_address = (0x40 >> 1) + 0 );
258
264 PCA9554( TwoWire& wire, uint8_t i2c_address = (0x40 >> 1) + 0 );
265
267 virtual ~PCA9554();
268
269 static constexpr uint8_t access_ref[ NUM_access_word ] = {
270 Input_Port, // IN,
271 Output_Port, // OUT
272 Polarity_Inversion, // POLARITY
273 Configuration, // CONFIG
274 0xFF, // DRIVE_STRENGTH ** CANNOT BE USED **
275 0xFF, // LATCHLATCH ** CANNOT BE USED **
276 0xFF, // PULL_UD_EN ** CANNOT BE USED **
277 0xFF, // PULL_UD_SEL ** CANNOT BE USED **
278 0xFF, // INT_MASK ** CANNOT BE USED **
279 0xFF, // INT_STATUS ** CANNOT BE USED **
280 0xFF, // OUTPUT_PORT_CONFIG ** CANNOT BE USED **
281 };
282
283#if DOXYGEN_ONLY
285 enum board {
286 NONE,
287 ARDUINO_SHIELD,
288 };
289
291 const int n_bits;
292
294 const int n_ports;
295
305 void begin( board env = NONE );
306
315 void output( int port, uint8_t value, uint8_t mask = 0 );
316
323 void output( const uint8_t *vp );
324
332 uint8_t input( int port );
333
341 uint8_t* input( uint8_t *vp );
342
351 void config( int port, uint8_t config, uint8_t mask = 0 );
352
359 void config( const uint8_t* vp );
360
368 void write_port( access_word w, const uint8_t* vp );
369
377 void write_port16( access_word w, const uint16_t* vp );
378
387 uint8_t* read_port( access_word w, uint8_t* vp );
388
397 uint16_t* read_port16( access_word w, uint16_t* vp );
398
407 void write_port( access_word w, uint8_t value, int port_num = 0 );
408
417 void write_port16( access_word w, uint16_t value, int port_num = 0 );
418
427 uint8_t read_port( access_word w, int port_num = 0 );
428
437 uint16_t read_port16( access_word w, int port_num = 0 );
438
443 bool ping( void );
444
452 int reg_w( uint8_t reg_adr, const uint8_t *data, uint16_t size );
453
461 int reg_w( uint8_t reg_adr, uint8_t data );
462
470 int reg_r( uint8_t reg_adr, uint8_t *data, uint16_t size );
471
477 uint8_t reg_r( uint8_t reg_adr );
478
484 void write_r8( uint8_t reg, uint8_t val );
485
493 void write_r16( uint8_t reg, uint16_t val );
494
500 uint8_t read_r8( uint8_t reg );
501
509 uint16_t read_r16( uint8_t reg );
510
519 void bit_op8( uint8_t reg, uint8_t mask, uint8_t value );
520 void bit_op16( uint8_t reg, uint16_t mask, uint16_t value );
521#endif // DOXYGEN_ONLY
522
523};
524
529class PCA9555 : public GPIO_base
530{
531public:
533 enum reg_num {
534 Input_Port_0, Input_Port_1,
535 Output_Port_0, Output_Port_1,
536 Polarity_Inversion_Port_0, Polarity_Inversion_Port_1,
537 Configuration_Port_0, Configuration_Port_1,
538 };
539
544 PCA9555( uint8_t i2c_address = (0x40 >> 1) + 0 );
545
551 PCA9555( TwoWire& wire, uint8_t i2c_address = (0x40 >> 1) + 0 );
552
554 virtual ~PCA9555();
555
556 static constexpr uint8_t access_ref[ NUM_access_word ] = {
557 Input_Port_0, // IN,
558 Output_Port_0, // OUT
559 Polarity_Inversion_Port_0, // POLARITY
560 Configuration_Port_0, // CONFIG
561 0xFF, // DRIVE_STRENGTH ** CANNOT BE USED **
562 0xFF, // LATCHLATCH ** CANNOT BE USED **
563 0xFF, // PULL_UD_EN ** CANNOT BE USED **
564 0xFF, // PULL_UD_SEL ** CANNOT BE USED **
565 0xFF, // INT_MASK ** CANNOT BE USED **
566 0xFF, // INT_STATUS ** CANNOT BE USED **
567 0xFF, // OUTPUT_PORT_CONFIG ** CANNOT BE USED **
568 };
569
570#if DOXYGEN_ONLY
572 enum board {
573 NONE,
574 ARDUINO_SHIELD,
575 };
576
578 const int n_bits;
579
581 const int n_ports;
582
592 void begin( board env = NONE );
593
602 void output( int port, uint8_t value, uint8_t mask = 0 );
603
610 void output( const uint8_t *vp );
611
619 uint8_t input( int port );
620
628 uint8_t* input( uint8_t *vp );
629
638 void config( int port, uint8_t config, uint8_t mask = 0 );
639
646 void config( const uint8_t* vp );
647
655 void write_port( access_word w, const uint8_t* vp );
656
664 void write_port16( access_word w, const uint16_t* vp );
665
674 uint8_t* read_port( access_word w, uint8_t* vp );
675
684 uint16_t* read_port16( access_word w, uint16_t* vp );
685
694 void write_port( access_word w, uint8_t value, int port_num = 0 );
695
704 void write_port16( access_word w, uint16_t value, int port_num = 0 );
705
714 uint8_t read_port( access_word w, int port_num = 0 );
715
724 uint16_t read_port16( access_word w, int port_num = 0 );
725
730 bool ping( void );
731
739 int reg_w( uint8_t reg_adr, const uint8_t *data, uint16_t size );
740
748 int reg_w( uint8_t reg_adr, uint8_t data );
749
757 int reg_r( uint8_t reg_adr, uint8_t *data, uint16_t size );
758
764 uint8_t reg_r( uint8_t reg_adr );
765
771 void write_r8( uint8_t reg, uint8_t val );
772
780 void write_r16( uint8_t reg, uint16_t val );
781
787 uint8_t read_r8( uint8_t reg );
788
796 uint16_t read_r16( uint8_t reg );
797
806 void bit_op8( uint8_t reg, uint8_t mask, uint8_t value );
807 void bit_op16( uint8_t reg, uint16_t mask, uint16_t value );
808#endif // DOXYGEN_ONLY
809};
810
819{
820public:
821 PCAL6xxx_base( uint8_t i2c_address, const int nbits, const uint8_t arp[], uint8_t ai );
822 PCAL6xxx_base( TwoWire& wire, uint8_t i2c_address, const int nbits, const uint8_t arp[], uint8_t ai );
823 virtual ~PCAL6xxx_base();
824};
825
826
832{
833public:
835 enum reg_num {
836 Input_Port,
837 Output_Port,
838 Polarity_Inversion,
839 Configuration,
840 Output_drive_strength_0 = 0x40,
841 Output_drive_strength_1,
842 Input_latch,
843 Pull_up_pull_down_enable,
844 Pull_up_pull_down_selection,
845 Interrupt_mask,
846 Interrupt_status,
847 Output_port_configuration,
848 };
849
854 PCAL6408A( uint8_t i2c_address = (0x40 >> 1) + 0 );
855
861 PCAL6408A( TwoWire& wire, uint8_t i2c_address = (0x40 >> 1) + 0 );
862
864 virtual ~PCAL6408A();
865
866 static constexpr uint8_t access_ref[ NUM_access_word ] = {
867 Input_Port, // IN,
868 Output_Port, // OUT
869 Polarity_Inversion, // POLARITY
870 Configuration, // CONFIG
871 Output_drive_strength_0, // DRIVE_STRENGTH
872 Input_latch, // LATCHLATCH
873 Pull_up_pull_down_enable, // PULL_UD_EN
874 Pull_up_pull_down_selection, // PULL_UD_SEL
875 Interrupt_mask, // INT_MASK
876 Interrupt_status, // INT_STATUS
877 Output_port_configuration, // OUTPUT_PORT_CONFIG
878 };
879
880#if DOXYGEN_ONLY
882 enum board {
883 NONE,
884 ARDUINO_SHIELD,
885 };
886
888 const int n_bits;
889
891 const int n_ports;
892
902 void begin( board env = NONE );
903
912 void output( int port, uint8_t value, uint8_t mask = 0 );
913
920 void output( const uint8_t *vp );
921
929 uint8_t input( int port );
930
938 uint8_t* input( uint8_t *vp );
939
948 void config( int port, uint8_t config, uint8_t mask = 0 );
949
956 void config( const uint8_t* vp );
957
965 void write_port( access_word w, const uint8_t* vp );
966
974 void write_port16( access_word w, const uint16_t* vp );
975
984 uint8_t* read_port( access_word w, uint8_t* vp );
985
994 uint16_t* read_port16( access_word w, uint16_t* vp );
995
1004 void write_port( access_word w, uint8_t value, int port_num = 0 );
1005
1014 void write_port16( access_word w, uint16_t value, int port_num = 0 );
1015
1024 uint8_t read_port( access_word w, int port_num = 0 );
1025
1034 uint16_t read_port16( access_word w, int port_num = 0 );
1035
1040 bool ping( void );
1041
1049 int reg_w( uint8_t reg_adr, const uint8_t *data, uint16_t size );
1050
1058 int reg_w( uint8_t reg_adr, uint8_t data );
1059
1067 int reg_r( uint8_t reg_adr, uint8_t *data, uint16_t size );
1068
1074 uint8_t reg_r( uint8_t reg_adr );
1075
1081 void write_r8( uint8_t reg, uint8_t val );
1082
1090 void write_r16( uint8_t reg, uint16_t val );
1091
1097 uint8_t read_r8( uint8_t reg );
1098
1106 uint16_t read_r16( uint8_t reg );
1107
1116 void bit_op8( uint8_t reg, uint8_t mask, uint8_t value );
1117 void bit_op16( uint8_t reg, uint16_t mask, uint16_t value );
1118#endif // DOXYGEN_ONLY
1119};
1120
1126{
1127public:
1129 enum reg_num {
1130 Input_Port_0, Input_Port_1,
1131 Output_Port_0, Output_Port_1,
1132 Polarity_Inversion_port_0, Polarity_Inversion_port_1,
1133 Configuration_port_0, Configuration_port_1,
1134 Output_drive_strength_register_0=0x40, Output_drive_strength_register_0B,
1135 Output_drive_strength_register_1, Output_drive_strength_register_1B,
1136 Input_latch_register_0, Input_latch_register_1,
1137 Pull_up_pull_down_enable_register_0, Pull_up_pull_down_enable_register_1,
1138 Pull_up_pull_down_selection_register_0, Pull_up_pull_down_selection_register_1,
1139 Interrupt_mask_register_0, Interrupt_mask_register_1,
1140 Interrupt_status_register_0, Interrupt_status_register_1,
1141 Output_port_configuration_register,
1142 };
1143
1148 PCAL6416A( uint8_t i2c_address = (0x40 >> 1) + 0 );
1149
1155 PCAL6416A( TwoWire& wire, uint8_t i2c_address = (0x40 >> 1) + 0 );
1156
1158 virtual ~PCAL6416A();
1159
1160 static constexpr uint8_t access_ref[ NUM_access_word ] = {
1161 Input_Port_0, // IN,
1162 Output_Port_0, // OUT
1163 Polarity_Inversion_port_0, // POLARITY
1164 Configuration_port_0, // CONFIG
1165 Output_drive_strength_register_0, // DRIVE_STRENGTH
1166 Input_latch_register_0, // LATCHLATCH
1167 Pull_up_pull_down_enable_register_0, // PULL_UD_EN
1168 Pull_up_pull_down_selection_register_0, // PULL_UD_SEL
1169 Interrupt_mask_register_0, // INT_MASK
1170 Interrupt_status_register_0, // INT_STATUS
1171 Output_port_configuration_register, // OUTPUT_PORT_CONFIG
1172 };
1173
1174#if DOXYGEN_ONLY
1176 enum board {
1177 NONE,
1178 ARDUINO_SHIELD,
1179 };
1180
1182 const int n_bits;
1183
1185 const int n_ports;
1186
1196 void begin( board env = NONE );
1197
1206 void output( int port, uint8_t value, uint8_t mask = 0 );
1207
1214 void output( const uint8_t *vp );
1215
1223 uint8_t input( int port );
1224
1232 uint8_t* input( uint8_t *vp );
1233
1242 void config( int port, uint8_t config, uint8_t mask = 0 );
1243
1250 void config( const uint8_t* vp );
1251
1259 void write_port( access_word w, const uint8_t* vp );
1260
1268 void write_port16( access_word w, const uint16_t* vp );
1269
1278 uint8_t* read_port( access_word w, uint8_t* vp );
1279
1288 uint16_t* read_port16( access_word w, uint16_t* vp );
1289
1298 void write_port( access_word w, uint8_t value, int port_num = 0 );
1299
1308 void write_port16( access_word w, uint16_t value, int port_num = 0 );
1309
1318 uint8_t read_port( access_word w, int port_num = 0 );
1319
1328 uint16_t read_port16( access_word w, int port_num = 0 );
1329
1334 bool ping( void );
1335
1343 int reg_w( uint8_t reg_adr, const uint8_t *data, uint16_t size );
1344
1352 int reg_w( uint8_t reg_adr, uint8_t data );
1353
1361 int reg_r( uint8_t reg_adr, uint8_t *data, uint16_t size );
1362
1368 uint8_t reg_r( uint8_t reg_adr );
1369
1375 void write_r8( uint8_t reg, uint8_t val );
1376
1384 void write_r16( uint8_t reg, uint16_t val );
1385
1391 uint8_t read_r8( uint8_t reg );
1392
1400 uint16_t read_r16( uint8_t reg );
1401
1410 void bit_op8( uint8_t reg, uint8_t mask, uint8_t value );
1411 void bit_op16( uint8_t reg, uint16_t mask, uint16_t value );
1412#endif // DOXYGEN_ONLY
1413};
1414
1420{
1421public:
1423 enum reg_num {
1424 Input_Port_0, Input_Port_1, Input_Port_2, reserved0,
1425 Output_Port_0, Output_Port_1, Output_Port_2, reserved1,
1426 Polarity_Inversion_port_0, Polarity_Inversion_port_1, Polarity_Inversion_port_2, reserved2,
1427 Configuration_port_0, Configuration_port_1, Configuration_port_2,
1428 Output_drive_strength_register_port_0A=0x40, Output_drive_strength_register_port_0B,
1429 Output_drive_strength_register_port_1A, Output_drive_strength_register_port_1B,
1430 Output_drive_strength_register_port_2A, Output_drive_strength_register_port_2B,
1431 reserved3, reserved4,
1432 Input_latch_register_port_0, Input_latch_register_port_1, Input_latch_register_port_2, reserved5,
1433 Pull_up_pull_down_enable_register_port_0, Pull_up_pull_down_enable_register_port_1, Pull_up_pull_down_enable_register_port_2, reserved6,
1434 Pull_up_pull_down_selection_register_port_0, Pull_up_pull_down_selection_register_port_1, Pull_up_pull_down_selection_register_port_2, reserved7,
1435 Interrupt_mask_register_port_0, Interrupt_mask_register_port_1, Interrupt_mask_register_port_2, reserved8,
1436 Interrupt_status_register_port_0, Interrupt_status_register_port_1, Interrupt_status_register_port_2, reserved9,
1437 Output_port_configuration_register, reserved10, reserved11, reserved12,
1438 Interrupt_edge_register_port_0A, Interrupt_edge_register_port_0B,
1439 Interrupt_edge_register_port_1A, Interrupt_edge_register_port_1B,
1440 Interrupt_edge_register_port_2A, Interrupt_edge_register_port_2B,
1441 reserved13, reserved14,
1442 Interrupt_clear_register_port_0, Interrupt_clear_register_port_1, Interrupt_clear_register_port_2, reserved15,
1443 Input_status_port_0, Input_status_port_1, Input_status_port_2, reserved16,
1444 Individual_pin_output_port_0_configuration_register, Individual_pin_output_port_1_configuration_register, Individual_pin_output_port_2_configuration_register, reserved17,
1445 Switch_debounce_enable_0, Switch_debounce_enable_1, Switch_debounce_count,
1446 };
1447
1452 PCAL6524( uint8_t i2c_address = (0x44 >> 1) + 0 );
1453
1459 PCAL6524( TwoWire& wire, uint8_t i2c_address = (0x44 >> 1) + 0 );
1460
1462 virtual ~PCAL6524();
1463
1464 static constexpr uint8_t access_ref[ NUM_access_word ] = {
1465 Input_Port_0, // IN,
1466 Output_Port_0, // OUT
1467 Polarity_Inversion_port_0, // POLARITY
1468 Configuration_port_0, // CONFIG
1469 Output_drive_strength_register_port_0A, // DRIVE_STRENGTH
1470 Input_latch_register_port_0, // LATCHLATCH
1471 Pull_up_pull_down_enable_register_port_0, // PULL_UD_EN
1472 Pull_up_pull_down_selection_register_port_0, // PULL_UD_SEL
1473 Interrupt_mask_register_port_0, // INT_MASK
1474 Interrupt_status_register_port_0, // INT_STATUS
1475 Output_port_configuration_register, // OUTPUT_PORT_CONFIG
1476 };
1477
1478#if DOXYGEN_ONLY
1480 enum board {
1481 NONE,
1482 ARDUINO_SHIELD,
1483 };
1484
1486 const int n_bits;
1487
1489 const int n_ports;
1490
1500 void begin( board env = NONE );
1501
1510 void output( int port, uint8_t value, uint8_t mask = 0 );
1511
1518 void output( const uint8_t *vp );
1519
1527 uint8_t input( int port );
1528
1536 uint8_t* input( uint8_t *vp );
1537
1546 void config( int port, uint8_t config, uint8_t mask = 0 );
1547
1554 void config( const uint8_t* vp );
1555
1563 void write_port( access_word w, const uint8_t* vp );
1564
1572 void write_port16( access_word w, const uint16_t* vp );
1573
1582 uint8_t* read_port( access_word w, uint8_t* vp );
1583
1592 uint16_t* read_port16( access_word w, uint16_t* vp );
1593
1602 void write_port( access_word w, uint8_t value, int port_num = 0 );
1603
1612 void write_port16( access_word w, uint16_t value, int port_num = 0 );
1613
1622 uint8_t read_port( access_word w, int port_num = 0 );
1623
1632 uint16_t read_port16( access_word w, int port_num = 0 );
1633
1638 bool ping( void );
1639
1647 int reg_w( uint8_t reg_adr, const uint8_t *data, uint16_t size );
1648
1656 int reg_w( uint8_t reg_adr, uint8_t data );
1657
1665 int reg_r( uint8_t reg_adr, uint8_t *data, uint16_t size );
1666
1672 uint8_t reg_r( uint8_t reg_adr );
1673
1679 void write_r8( uint8_t reg, uint8_t val );
1680
1688 void write_r16( uint8_t reg, uint16_t val );
1689
1695 uint8_t read_r8( uint8_t reg );
1696
1704 uint16_t read_r16( uint8_t reg );
1705
1714 void bit_op8( uint8_t reg, uint8_t mask, uint8_t value );
1715 void bit_op16( uint8_t reg, uint16_t mask, uint16_t value );
1716#endif // DOXYGEN_ONLY
1717};
1718
1724{
1725public:
1727 enum reg_num {
1728 Input_Port_0, Input_Port_1, Input_Port_2, Input_Port_3, Input_Port_4,
1729 Output_Port_0, Output_Port_1, Output_Port_2, Output_Port_3, Output_Port_4,
1730 Polarity_Inversion_port_0, Polarity_Inversion_port_1, Polarity_Inversion_port_2, Polarity_Inversion_port_3, Polarity_Inversion_port_4,
1731 Configuration_port_0, Configuration_port_1, Configuration_port_2, Configuration_port_3, Configuration_port_4,
1732 Output_drive_strength_register_port_0A = 0x30, Output_drive_strength_register_port_0B,
1733 Output_drive_strength_register_port_1A, Output_drive_strength_register_port_1B,
1734 Output_drive_strength_register_port_2A, Output_drive_strength_register_port_2B,
1735 Output_drive_strength_register_port_3A, Output_drive_strength_register_port_3B,
1736 Output_drive_strength_register_port_4A, reserved0,
1737 Input_latch_register_port_0, Input_latch_register_port_1, Input_latch_register_port_2, Input_latch_register_port_3, Input_latch_register_port_4,
1738 Pull_up_pull_down_enable_register_port_0, Pull_up_pull_down_enable_register_port_1, Pull_up_pull_down_enable_register_port_2, Pull_up_pull_down_enable_register_port_3, Pull_up_pull_down_enable_register_port_4,
1739 Pull_up_pull_down_selection_register_port_0, Pull_up_pull_down_selection_register_port_1, Pull_up_pull_down_selection_register_port_2, Pull_up_pull_down_selection_register_port_3, Pull_up_pull_down_selection_register_port_4,
1740 Interrupt_mask_register_port_0, Interrupt_mask_register_port_1, Interrupt_mask_register_port_2, Interrupt_mask_register_port_3, Interrupt_mask_register_port_4,
1741 Interrupt_status_register_port_0, Interrupt_status_register_port_1, Interrupt_status_register_port_2, Interrupt_status_register_port_3, Interrupt_status_register_port_4,
1742 Output_port_configuration_register,
1743 Interrupt_edge_register_port_0A, Interrupt_edge_register_port_0B,
1744 Interrupt_edge_register_port_1A, Interrupt_edge_register_port_1B,
1745 Interrupt_edge_register_port_2A, Interrupt_edge_register_port_2B,
1746 Interrupt_edge_register_port_3A, Interrupt_edge_register_port_3B,
1747 Interrupt_edge_register_port_4A, reserved1,
1748 Interrupt_clear_register_port_0, Interrupt_clear_register_port_1, Interrupt_clear_register_port_2, Interrupt_clear_register_port_3, Interrupt_clear_register_port_4,
1749 Input_status_port_0, Input_status_port_1, Input_status_port_2, Input_status_port_3, Input_status_port_4,
1750 Individual_pin_output_port_0_configuration_register, Individual_pin_output_port_1_configuration_register, Individual_pin_output_port_2_configuration_register, Individual_pin_output_port_3_configuration_register, Individual_pin_output_port_4_configuration_register,
1751 Switch_debounce_enable_0, Switch_debounce_enable_1,
1752 Switch_debounce_count,
1753 };
1754
1759 PCAL6534( uint8_t i2c_address = (0x44 >> 1) + 0 );
1760
1766 PCAL6534( TwoWire& wire, uint8_t i2c_address = (0x44 >> 1) + 0 );
1767
1769 virtual ~PCAL6534();
1770
1771 static constexpr uint8_t access_ref[ NUM_access_word ] = {
1772 Input_Port_0, // IN,
1773 Output_Port_0, // OUT
1774 Polarity_Inversion_port_0, // POLARITY
1775 Configuration_port_0, // CONFIG
1776 Output_drive_strength_register_port_0A, // DRIVE_STRENGTH
1777 Input_latch_register_port_0, // LATCHLATCH
1778 Pull_up_pull_down_enable_register_port_0, // PULL_UD_EN
1779 Pull_up_pull_down_selection_register_port_0, // PULL_UD_SEL
1780 Interrupt_mask_register_port_0, // INT_MASK
1781 Interrupt_status_register_port_0, // INT_STATUS
1782 Output_port_configuration_register, // OUTPUT_PORT_CONFIG
1783 };
1784
1785#if DOXYGEN_ONLY
1787 enum board {
1788 NONE,
1789 ARDUINO_SHIELD,
1790 };
1791
1793 const int n_bits;
1794
1796 const int n_ports;
1797
1807 void begin( board env = NONE );
1808
1817 void output( int port, uint8_t value, uint8_t mask = 0 );
1818
1825 void output( const uint8_t *vp );
1826
1834 uint8_t input( int port );
1835
1843 uint8_t* input( uint8_t *vp );
1844
1853 void config( int port, uint8_t config, uint8_t mask = 0 );
1854
1861 void config( const uint8_t* vp );
1862
1870 void write_port( access_word w, const uint8_t* vp );
1871
1879 void write_port16( access_word w, const uint16_t* vp );
1880
1889 uint8_t* read_port( access_word w, uint8_t* vp );
1890
1899 uint16_t* read_port16( access_word w, uint16_t* vp );
1900
1909 void write_port( access_word w, uint8_t value, int port_num = 0 );
1910
1919 void write_port16( access_word w, uint16_t value, int port_num = 0 );
1920
1929 uint8_t read_port( access_word w, int port_num = 0 );
1930
1939 uint16_t read_port16( access_word w, int port_num = 0 );
1940
1945 bool ping( void );
1946
1954 int reg_w( uint8_t reg_adr, const uint8_t *data, uint16_t size );
1955
1963 int reg_w( uint8_t reg_adr, uint8_t data );
1964
1972 int reg_r( uint8_t reg_adr, uint8_t *data, uint16_t size );
1973
1979 uint8_t reg_r( uint8_t reg_adr );
1980
1986 void write_r8( uint8_t reg, uint8_t val );
1987
1995 void write_r16( uint8_t reg, uint16_t val );
1996
2002 uint8_t read_r8( uint8_t reg );
2003
2011 uint16_t read_r16( uint8_t reg );
2012
2021 void bit_op8( uint8_t reg, uint8_t mask, uint8_t value );
2022 void bit_op16( uint8_t reg, uint16_t mask, uint16_t value );
2023#endif // DOXYGEN_ONLY
2024};
2025
2026class GPIO_SPI : public GPIO_base
2027{
2028public:
2034 GPIO_SPI( uint8_t device_address, int nbits, const uint8_t* arp, uint8_t ai );
2035
2038 virtual ~GPIO_SPI();
2039
2047 virtual int reg_w( uint8_t reg_adr, const uint8_t *data, uint16_t size );
2048
2056 virtual int reg_w( uint8_t reg_adr, uint8_t data );
2057
2065 virtual int reg_r( uint8_t reg_adr, uint8_t *data, uint16_t size );
2066
2074 virtual uint8_t reg_r( uint8_t reg_adr );
2075};
2076
2085{
2086public:
2087 PCAL97xx_base( uint8_t dev_address, const int nbits, const uint8_t arp[], uint8_t ai );
2088 virtual ~PCAL97xx_base();
2089};
2090
2096{
2097public:
2099 enum reg_num {
2100 Input_Port_0, Input_Port_1, Input_Port_2, reserved0,
2101 Output_Port_0, Output_Port_1, Output_Port_2, reserved1,
2102 Polarity_Inversion_port_0, Polarity_Inversion_port_1, Polarity_Inversion_port_2, reserved2,
2103 Configuration_port_0, Configuration_port_1, Configuration_port_2,
2104 Output_drive_strength_register_port_0A=0x40, Output_drive_strength_register_port_0B,
2105 Output_drive_strength_register_port_1A, Output_drive_strength_register_port_1B,
2106 Output_drive_strength_register_port_2A, Output_drive_strength_register_port_2B,
2107 reserved3, reserved4,
2108 Input_latch_register_port_0, Input_latch_register_port_1, Input_latch_register_port_2, reserved5,
2109 Pull_up_pull_down_enable_register_port_0, Pull_up_pull_down_enable_register_port_1, Pull_up_pull_down_enable_register_port_2, reserved6,
2110 Pull_up_pull_down_selection_register_port_0, Pull_up_pull_down_selection_register_port_1, Pull_up_pull_down_selection_register_port_2, reserved7,
2111 Interrupt_mask_register_port_0, Interrupt_mask_register_port_1, Interrupt_mask_register_port_2, reserved8,
2112 Interrupt_status_register_port_0, Interrupt_status_register_port_1, Interrupt_status_register_port_2, reserved9,
2113 Output_port_configuration_register, reserved10, reserved11, reserved12,
2114 Interrupt_edge_register_port_0A, Interrupt_edge_register_port_0B,
2115 Interrupt_edge_register_port_1A, Interrupt_edge_register_port_1B,
2116 Interrupt_edge_register_port_2A, Interrupt_edge_register_port_2B,
2117 reserved13, reserved14,
2118 Interrupt_clear_register_port_0, Interrupt_clear_register_port_1, Interrupt_clear_register_port_2, reserved15,
2119 Input_status_port_0, Input_status_port_1, Input_status_port_2, reserved16,
2120 Individual_pin_output_port_0_configuration_register, Individual_pin_output_port_1_configuration_register, Individual_pin_output_port_2_configuration_register, reserved17,
2121 Switch_debounce_enable_0, Switch_debounce_enable_1, Switch_debounce_count,
2122 };
2123
2129 PCAL9722( uint8_t dev_address = (0x40 >> 1) + 0 );
2130
2132 virtual ~PCAL9722();
2133
2143 void begin( board env = NONE );
2144
2145 static constexpr uint8_t access_ref[ NUM_access_word ] = {
2146 Input_Port_0, // IN,
2147 Output_Port_0, // OUT
2148 Polarity_Inversion_port_0, // POLARITY
2149 Configuration_port_0, // CONFIG
2150 Output_drive_strength_register_port_0A, // DRIVE_STRENGTH
2151 Input_latch_register_port_0, // LATCHLATCH
2152 Pull_up_pull_down_enable_register_port_0, // PULL_UD_EN
2153 Pull_up_pull_down_selection_register_port_0, // PULL_UD_SEL
2154 Interrupt_mask_register_port_0, // INT_MASK
2155 Interrupt_status_register_port_0, // INT_STATUS
2156 Output_port_configuration_register, // OUTPUT_PORT_CONFIG
2157 };
2158
2159private:
2160 static constexpr int RESET_PIN_PCAL9722 = 6;
2161
2162public:
2163#if DOXYGEN_ONLY
2165 enum board {
2166 NONE,
2167 ARDUINO_SHIELD,
2168 };
2169
2171 const int n_bits;
2172
2174 const int n_ports;
2175
2184 void output( int port, uint8_t value, uint8_t mask = 0 );
2185
2192 void output( const uint8_t *vp );
2193
2201 uint8_t input( int port );
2202
2210 uint8_t* input( uint8_t *vp );
2211
2220 void config( int port, uint8_t config, uint8_t mask = 0 );
2221
2228 void config( const uint8_t* vp );
2229
2237 void write_port( access_word w, const uint8_t* vp );
2238
2246 void write_port16( access_word w, const uint16_t* vp );
2247
2256 uint8_t* read_port( access_word w, uint8_t* vp );
2257
2266 uint16_t* read_port16( access_word w, uint16_t* vp );
2267
2276 void write_port( access_word w, uint8_t value, int port_num = 0 );
2277
2286 void write_port16( access_word w, uint16_t value, int port_num = 0 );
2287
2296 uint8_t read_port( access_word w, int port_num = 0 );
2297
2306 uint16_t read_port16( access_word w, int port_num = 0 );
2307
2315 int reg_w( uint8_t reg_adr, const uint8_t *data, uint16_t size );
2316
2324 int reg_w( uint8_t reg_adr, uint8_t data );
2325
2333 int reg_r( uint8_t reg_adr, uint8_t *data, uint16_t size );
2334
2340 uint8_t reg_r( uint8_t reg_adr );
2341
2347 void write_r8( uint8_t reg, uint8_t val );
2348
2356 void write_r16( uint8_t reg, uint16_t val );
2357
2363 uint8_t read_r8( uint8_t reg );
2364
2372 uint16_t read_r16( uint8_t reg );
2373
2382 void bit_op8( uint8_t reg, uint8_t mask, uint8_t value );
2383 void bit_op16( uint8_t reg, uint16_t mask, uint16_t value );
2384#endif // DOXYGEN_ONLY
2385};
2386
2387
2388#endif // ARDUINO_GPIO_NXP_ARD_H
virtual int reg_r(uint8_t reg_adr, uint8_t *data, uint16_t size)
Definition GPIO_NXP.cpp:367
GPIO_SPI(uint8_t device_address, int nbits, const uint8_t *arp, uint8_t ai)
Definition GPIO_NXP.cpp:329
virtual ~GPIO_SPI()
Definition GPIO_NXP.cpp:335
virtual int reg_w(uint8_t reg_adr, const uint8_t *data, uint16_t size)
Definition GPIO_NXP.cpp:339
virtual uint16_t * read_port16(access_word w, uint16_t *vp)
Definition GPIO_NXP.cpp:143
virtual void write_port(access_word w, const uint8_t *vp)
Definition GPIO_NXP.cpp:93
const int n_bits
Definition GPIO_NXP.h:53
virtual void config(int port, uint8_t config, uint8_t mask=0)
Definition GPIO_NXP.cpp:80
const int n_ports
Definition GPIO_NXP.h:56
virtual ~GPIO_base()
Definition GPIO_NXP.cpp:33
GPIO_base(uint8_t i2c_address, int nbits, const uint8_t *arp, uint8_t ai)
Definition GPIO_NXP.cpp:5
virtual void write_port16(access_word w, const uint16_t *vp)
Definition GPIO_NXP.cpp:104
virtual void output(int port, uint8_t value, uint8_t mask=0)
Definition GPIO_NXP.cpp:55
virtual void begin(board env=NONE)
Definition GPIO_NXP.cpp:37
virtual uint8_t input(int port)
Definition GPIO_NXP.cpp:68
virtual uint8_t * read_port(access_word w, uint8_t *vp)
Definition GPIO_NXP.cpp:130
void config(const uint8_t *vp)
int reg_r(uint8_t reg_adr, uint8_t *data, uint16_t size)
void output(const uint8_t *vp)
const int n_bits
Definition GPIO_NXP.h:291
void write_r16(uint8_t reg, uint16_t val)
void write_port16(access_word w, const uint16_t *vp)
void write_port16(access_word w, uint16_t value, int port_num=0)
uint8_t read_r8(uint8_t reg)
void write_r8(uint8_t reg, uint8_t val)
uint8_t reg_r(uint8_t reg_adr)
void bit_op8(uint8_t reg, uint8_t mask, uint8_t value)
int reg_w(uint8_t reg_adr, const uint8_t *data, uint16_t size)
const int n_ports
Definition GPIO_NXP.h:294
uint16_t read_port16(access_word w, int port_num=0)
void output(int port, uint8_t value, uint8_t mask=0)
uint16_t * read_port16(access_word w, uint16_t *vp)
int reg_w(uint8_t reg_adr, uint8_t data)
void config(int port, uint8_t config, uint8_t mask=0)
uint8_t * input(uint8_t *vp)
void begin(board env=NONE)
void write_port(access_word w, const uint8_t *vp)
uint8_t * read_port(access_word w, uint8_t *vp)
uint16_t read_r16(uint8_t reg)
bool ping(void)
uint8_t input(int port)
PCA9554(uint8_t i2c_address=(0x40 > > 1)+0)
Definition GPIO_NXP.cpp:198
void write_port(access_word w, uint8_t value, int port_num=0)
uint8_t read_port(access_word w, int port_num=0)
virtual ~PCA9554()
Definition GPIO_NXP.cpp:208
void write_r8(uint8_t reg, uint8_t val)
uint8_t * read_port(access_word w, uint8_t *vp)
void config(int port, uint8_t config, uint8_t mask=0)
uint16_t read_port16(access_word w, int port_num=0)
virtual ~PCA9555()
Definition GPIO_NXP.cpp:227
void output(const uint8_t *vp)
void write_port(access_word w, uint8_t value, int port_num=0)
void write_port16(access_word w, uint16_t value, int port_num=0)
void output(int port, uint8_t value, uint8_t mask=0)
uint16_t read_r16(uint8_t reg)
int reg_w(uint8_t reg_adr, uint8_t data)
const int n_bits
Definition GPIO_NXP.h:578
uint8_t reg_r(uint8_t reg_adr)
uint8_t read_r8(uint8_t reg)
void write_port(access_word w, const uint8_t *vp)
uint16_t * read_port16(access_word w, uint16_t *vp)
int reg_r(uint8_t reg_adr, uint8_t *data, uint16_t size)
void write_r16(uint8_t reg, uint16_t val)
int reg_w(uint8_t reg_adr, const uint8_t *data, uint16_t size)
uint8_t * input(uint8_t *vp)
void bit_op8(uint8_t reg, uint8_t mask, uint8_t value)
uint8_t input(int port)
void write_port16(access_word w, const uint16_t *vp)
const int n_ports
Definition GPIO_NXP.h:581
PCA9555(uint8_t i2c_address=(0x40 > > 1)+0)
Definition GPIO_NXP.cpp:217
bool ping(void)
void begin(board env=NONE)
void config(const uint8_t *vp)
uint8_t read_port(access_word w, int port_num=0)
uint16_t * read_port16(access_word w, uint16_t *vp)
uint8_t read_r8(uint8_t reg)
void output(const uint8_t *vp)
void config(const uint8_t *vp)
PCAL6408A(uint8_t i2c_address=(0x40 > > 1)+0)
Definition GPIO_NXP.cpp:253
const int n_bits
Definition GPIO_NXP.h:888
uint8_t * input(uint8_t *vp)
void write_port16(access_word w, uint16_t value, int port_num=0)
void begin(board env=NONE)
void bit_op8(uint8_t reg, uint8_t mask, uint8_t value)
bool ping(void)
void write_r8(uint8_t reg, uint8_t val)
void write_r16(uint8_t reg, uint16_t val)
int reg_r(uint8_t reg_adr, uint8_t *data, uint16_t size)
uint8_t reg_r(uint8_t reg_adr)
int reg_w(uint8_t reg_adr, uint8_t data)
uint16_t read_port16(access_word w, int port_num=0)
uint8_t * read_port(access_word w, uint8_t *vp)
const int n_ports
Definition GPIO_NXP.h:891
uint8_t read_port(access_word w, int port_num=0)
void config(int port, uint8_t config, uint8_t mask=0)
void write_port(access_word w, uint8_t value, int port_num=0)
virtual ~PCAL6408A()
Definition GPIO_NXP.cpp:263
void write_port(access_word w, const uint8_t *vp)
int reg_w(uint8_t reg_adr, const uint8_t *data, uint16_t size)
void write_port16(access_word w, const uint16_t *vp)
void output(int port, uint8_t value, uint8_t mask=0)
uint8_t input(int port)
uint16_t read_r16(uint8_t reg)
uint16_t read_port16(access_word w, int port_num=0)
PCAL6416A(uint8_t i2c_address=(0x40 > > 1)+0)
Definition GPIO_NXP.cpp:272
bool ping(void)
void write_r8(uint8_t reg, uint8_t val)
void output(const uint8_t *vp)
void bit_op8(uint8_t reg, uint8_t mask, uint8_t value)
void write_port(access_word w, const uint8_t *vp)
int reg_w(uint8_t reg_adr, uint8_t data)
void config(const uint8_t *vp)
uint8_t reg_r(uint8_t reg_adr)
void output(int port, uint8_t value, uint8_t mask=0)
int reg_w(uint8_t reg_adr, const uint8_t *data, uint16_t size)
int reg_r(uint8_t reg_adr, uint8_t *data, uint16_t size)
void begin(board env=NONE)
uint8_t read_port(access_word w, int port_num=0)
uint8_t * input(uint8_t *vp)
uint8_t * read_port(access_word w, uint8_t *vp)
uint16_t * read_port16(access_word w, uint16_t *vp)
uint8_t read_r8(uint8_t reg)
uint8_t input(int port)
void config(int port, uint8_t config, uint8_t mask=0)
const int n_ports
Definition GPIO_NXP.h:1185
virtual ~PCAL6416A()
Definition GPIO_NXP.cpp:282
uint16_t read_r16(uint8_t reg)
void write_port16(access_word w, uint16_t value, int port_num=0)
const int n_bits
Definition GPIO_NXP.h:1182
void write_port(access_word w, uint8_t value, int port_num=0)
void write_r16(uint8_t reg, uint16_t val)
void write_port16(access_word w, const uint16_t *vp)
uint8_t read_port(access_word w, int port_num=0)
virtual ~PCAL6524()
Definition GPIO_NXP.cpp:301
void output(const uint8_t *vp)
void bit_op8(uint8_t reg, uint8_t mask, uint8_t value)
void config(int port, uint8_t config, uint8_t mask=0)
uint8_t * input(uint8_t *vp)
const int n_ports
Definition GPIO_NXP.h:1489
PCAL6524(uint8_t i2c_address=(0x44 > > 1)+0)
Definition GPIO_NXP.cpp:291
int reg_r(uint8_t reg_adr, uint8_t *data, uint16_t size)
void begin(board env=NONE)
void write_port(access_word w, const uint8_t *vp)
uint8_t * read_port(access_word w, uint8_t *vp)
int reg_w(uint8_t reg_adr, const uint8_t *data, uint16_t size)
void write_r8(uint8_t reg, uint8_t val)
uint16_t read_r16(uint8_t reg)
uint16_t * read_port16(access_word w, uint16_t *vp)
void output(int port, uint8_t value, uint8_t mask=0)
void write_r16(uint8_t reg, uint16_t val)
void write_port16(access_word w, const uint16_t *vp)
bool ping(void)
void config(const uint8_t *vp)
uint8_t reg_r(uint8_t reg_adr)
uint8_t read_r8(uint8_t reg)
void write_port16(access_word w, uint16_t value, int port_num=0)
uint16_t read_port16(access_word w, int port_num=0)
void write_port(access_word w, uint8_t value, int port_num=0)
const int n_bits
Definition GPIO_NXP.h:1486
uint8_t input(int port)
int reg_w(uint8_t reg_adr, uint8_t data)
void write_r16(uint8_t reg, uint16_t val)
void write_port16(access_word w, uint16_t value, int port_num=0)
uint8_t reg_r(uint8_t reg_adr)
uint8_t * read_port(access_word w, uint8_t *vp)
const int n_ports
Definition GPIO_NXP.h:1796
void output(const uint8_t *vp)
uint16_t read_port16(access_word w, int port_num=0)
int reg_w(uint8_t reg_adr, const uint8_t *data, uint16_t size)
void config(const uint8_t *vp)
virtual ~PCAL6534()
Definition GPIO_NXP.cpp:320
uint8_t read_port(access_word w, int port_num=0)
void write_port(access_word w, uint8_t value, int port_num=0)
void write_r8(uint8_t reg, uint8_t val)
void begin(board env=NONE)
int reg_r(uint8_t reg_adr, uint8_t *data, uint16_t size)
PCAL6534(uint8_t i2c_address=(0x44 > > 1)+0)
Definition GPIO_NXP.cpp:310
uint8_t read_r8(uint8_t reg)
uint16_t read_r16(uint8_t reg)
uint16_t * read_port16(access_word w, uint16_t *vp)
void config(int port, uint8_t config, uint8_t mask=0)
uint8_t * input(uint8_t *vp)
uint8_t input(int port)
void write_port(access_word w, const uint8_t *vp)
void write_port16(access_word w, const uint16_t *vp)
void output(int port, uint8_t value, uint8_t mask=0)
int reg_w(uint8_t reg_adr, uint8_t data)
bool ping(void)
const int n_bits
Definition GPIO_NXP.h:1793
void bit_op8(uint8_t reg, uint8_t mask, uint8_t value)
void output(const uint8_t *vp)
void config(const uint8_t *vp)
void begin(board env=NONE)
Definition GPIO_NXP.cpp:415
void write_port(access_word w, uint8_t value, int port_num=0)
const int n_bits
Definition GPIO_NXP.h:2171
virtual ~PCAL9722()
Definition GPIO_NXP.cpp:411
void write_port16(access_word w, uint16_t value, int port_num=0)
void write_r8(uint8_t reg, uint8_t val)
uint16_t * read_port16(access_word w, uint16_t *vp)
uint16_t read_r16(uint8_t reg)
const int n_ports
Definition GPIO_NXP.h:2174
uint8_t input(int port)
uint8_t * read_port(access_word w, uint8_t *vp)
void write_port16(access_word w, const uint16_t *vp)
uint8_t read_port(access_word w, int port_num=0)
void write_port(access_word w, const uint8_t *vp)
PCAL9722(uint8_t dev_address=(0x40 > > 1)+0)
Definition GPIO_NXP.cpp:406
void output(int port, uint8_t value, uint8_t mask=0)
int reg_w(uint8_t reg_adr, uint8_t data)
int reg_r(uint8_t reg_adr, uint8_t *data, uint16_t size)
void config(int port, uint8_t config, uint8_t mask=0)
void write_r16(uint8_t reg, uint16_t val)
int reg_w(uint8_t reg_adr, const uint8_t *data, uint16_t size)
uint8_t reg_r(uint8_t reg_adr)
uint16_t read_port16(access_word w, int port_num=0)
uint8_t * input(uint8_t *vp)
void bit_op8(uint8_t reg, uint8_t mask, uint8_t value)
uint8_t read_r8(uint8_t reg)