GPIO_NXP_Arduino 1.1.0
GPIO device operation sample code for Arduino
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PCAL9722 Member List

This is the complete list of members for PCAL9722, including all inherited members.

access_ref (defined in PCAL9722)PCAL9722static
ARDUINO_SHIELD enum value (defined in PCAL9722)PCAL9722
auto_increment (defined in GPIO_base)GPIO_baseprotected
begin(board env=NONE)PCAL9722
PCAL97xx_base::begin(board env=NONE)GPIO_basevirtual
bit_op16(uint8_t reg, uint16_t mask, uint16_t value) (defined in PCAL9722)PCAL9722
bit_op8(uint8_t reg, uint8_t mask, uint8_t value)PCAL9722
board enum namePCAL9722
config(int port, uint8_t config, uint8_t mask=0)PCAL9722virtual
config(const uint8_t *vp)PCAL9722virtual
Configuration_port_0 enum value (defined in PCAL9722)PCAL9722
Configuration_port_1 enum value (defined in PCAL9722)PCAL9722
Configuration_port_2 enum value (defined in PCAL9722)PCAL9722
GPIO_base(uint8_t i2c_address, int nbits, const uint8_t *arp, uint8_t ai)GPIO_base
GPIO_base(TwoWire &wire, uint8_t i2c_address, int nbits, const uint8_t *arp, uint8_t ai)GPIO_base
GPIO_SPI(uint8_t device_address, int nbits, const uint8_t *arp, uint8_t ai)GPIO_SPI
Individual_pin_output_port_0_configuration_register enum value (defined in PCAL9722)PCAL9722
Individual_pin_output_port_1_configuration_register enum value (defined in PCAL9722)PCAL9722
Individual_pin_output_port_2_configuration_register enum value (defined in PCAL9722)PCAL9722
input(int port)PCAL9722virtual
input(uint8_t *vp)PCAL9722virtual
Input_latch_register_port_0 enum value (defined in PCAL9722)PCAL9722
Input_latch_register_port_1 enum value (defined in PCAL9722)PCAL9722
Input_latch_register_port_2 enum value (defined in PCAL9722)PCAL9722
Input_Port_0 enum value (defined in PCAL9722)PCAL9722
Input_Port_1 enum value (defined in PCAL9722)PCAL9722
Input_Port_2 enum value (defined in PCAL9722)PCAL9722
Input_status_port_0 enum value (defined in PCAL9722)PCAL9722
Input_status_port_1 enum value (defined in PCAL9722)PCAL9722
Input_status_port_2 enum value (defined in PCAL9722)PCAL9722
Interrupt_clear_register_port_0 enum value (defined in PCAL9722)PCAL9722
Interrupt_clear_register_port_1 enum value (defined in PCAL9722)PCAL9722
Interrupt_clear_register_port_2 enum value (defined in PCAL9722)PCAL9722
Interrupt_edge_register_port_0A enum value (defined in PCAL9722)PCAL9722
Interrupt_edge_register_port_0B enum value (defined in PCAL9722)PCAL9722
Interrupt_edge_register_port_1A enum value (defined in PCAL9722)PCAL9722
Interrupt_edge_register_port_1B enum value (defined in PCAL9722)PCAL9722
Interrupt_edge_register_port_2A enum value (defined in PCAL9722)PCAL9722
Interrupt_edge_register_port_2B enum value (defined in PCAL9722)PCAL9722
Interrupt_mask_register_port_0 enum value (defined in PCAL9722)PCAL9722
Interrupt_mask_register_port_1 enum value (defined in PCAL9722)PCAL9722
Interrupt_mask_register_port_2 enum value (defined in PCAL9722)PCAL9722
Interrupt_status_register_port_0 enum value (defined in PCAL9722)PCAL9722
Interrupt_status_register_port_1 enum value (defined in PCAL9722)PCAL9722
Interrupt_status_register_port_2 enum value (defined in PCAL9722)PCAL9722
n_bitsPCAL9722
n_portsPCAL9722
NONE enum value (defined in PCAL9722)PCAL9722
output(int port, uint8_t value, uint8_t mask=0)PCAL9722virtual
output(const uint8_t *vp)PCAL9722virtual
Output_drive_strength_register_port_0A enum value (defined in PCAL9722)PCAL9722
Output_drive_strength_register_port_0B enum value (defined in PCAL9722)PCAL9722
Output_drive_strength_register_port_1A enum value (defined in PCAL9722)PCAL9722
Output_drive_strength_register_port_1B enum value (defined in PCAL9722)PCAL9722
Output_drive_strength_register_port_2A enum value (defined in PCAL9722)PCAL9722
Output_drive_strength_register_port_2B enum value (defined in PCAL9722)PCAL9722
Output_Port_0 enum value (defined in PCAL9722)PCAL9722
Output_Port_1 enum value (defined in PCAL9722)PCAL9722
Output_Port_2 enum value (defined in PCAL9722)PCAL9722
Output_port_configuration_register enum value (defined in PCAL9722)PCAL9722
PCAL9722(uint8_t dev_address=(0x40 > > 1)+0)PCAL9722
PCAL97xx_base(uint8_t dev_address, const int nbits, const uint8_t arp[], uint8_t ai) (defined in PCAL97xx_base)PCAL97xx_base
Polarity_Inversion_port_0 enum value (defined in PCAL9722)PCAL9722
Polarity_Inversion_port_1 enum value (defined in PCAL9722)PCAL9722
Polarity_Inversion_port_2 enum value (defined in PCAL9722)PCAL9722
print_bin(uint8_t v) (defined in GPIO_base)GPIO_basestatic
Pull_up_pull_down_enable_register_port_0 enum value (defined in PCAL9722)PCAL9722
Pull_up_pull_down_enable_register_port_1 enum value (defined in PCAL9722)PCAL9722
Pull_up_pull_down_enable_register_port_2 enum value (defined in PCAL9722)PCAL9722
Pull_up_pull_down_selection_register_port_0 enum value (defined in PCAL9722)PCAL9722
Pull_up_pull_down_selection_register_port_1 enum value (defined in PCAL9722)PCAL9722
Pull_up_pull_down_selection_register_port_2 enum value (defined in PCAL9722)PCAL9722
read_port(access_word w, uint8_t *vp)PCAL9722virtual
read_port(access_word w, int port_num=0)PCAL9722virtual
read_port16(access_word w, uint16_t *vp)PCAL9722virtual
read_port16(access_word w, int port_num=0)PCAL9722virtual
read_r16(uint8_t reg)PCAL9722
read_r8(uint8_t reg)PCAL9722
reg_num enum namePCAL9722
reg_r(uint8_t reg_adr, uint8_t *data, uint16_t size)PCAL9722virtual
reg_r(uint8_t reg_adr)PCAL9722virtual
reg_w(uint8_t reg_adr, const uint8_t *data, uint16_t size)PCAL9722virtual
reg_w(uint8_t reg_adr, uint8_t data)PCAL9722virtual
reserved0 enum value (defined in PCAL9722)PCAL9722
reserved1 enum value (defined in PCAL9722)PCAL9722
reserved10 enum value (defined in PCAL9722)PCAL9722
reserved11 enum value (defined in PCAL9722)PCAL9722
reserved12 enum value (defined in PCAL9722)PCAL9722
reserved13 enum value (defined in PCAL9722)PCAL9722
reserved14 enum value (defined in PCAL9722)PCAL9722
reserved15 enum value (defined in PCAL9722)PCAL9722
reserved16 enum value (defined in PCAL9722)PCAL9722
reserved17 enum value (defined in PCAL9722)PCAL9722
reserved2 enum value (defined in PCAL9722)PCAL9722
reserved3 enum value (defined in PCAL9722)PCAL9722
reserved4 enum value (defined in PCAL9722)PCAL9722
reserved5 enum value (defined in PCAL9722)PCAL9722
reserved6 enum value (defined in PCAL9722)PCAL9722
reserved7 enum value (defined in PCAL9722)PCAL9722
reserved8 enum value (defined in PCAL9722)PCAL9722
reserved9 enum value (defined in PCAL9722)PCAL9722
Switch_debounce_count enum value (defined in PCAL9722)PCAL9722
Switch_debounce_enable_0 enum value (defined in PCAL9722)PCAL9722
Switch_debounce_enable_1 enum value (defined in PCAL9722)PCAL9722
write_port(access_word w, const uint8_t *vp)PCAL9722virtual
write_port(access_word w, uint8_t value, int port_num=0)PCAL9722virtual
write_port16(access_word w, const uint16_t *vp)PCAL9722virtual
write_port16(access_word w, uint16_t value, int port_num=0)PCAL9722virtual
write_r16(uint8_t reg, uint16_t val)PCAL9722
write_r8(uint8_t reg, uint8_t val)PCAL9722
~GPIO_base()GPIO_basevirtual
~GPIO_SPI()GPIO_SPIvirtual
~PCAL9722()PCAL9722virtual
~PCAL97xx_base() (defined in PCAL97xx_base)PCAL97xx_basevirtual