GPIO_NXP_Arduino 0.4.0
GPIO device operation sample code for Arduino
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GPIO_NXP.h
1
8#ifndef ARDUINO_GPIO_NXP_ARD_H
9#define ARDUINO_GPIO_NXP_ARD_H
10
11#include <Arduino.h>
12#include <stdint.h>
13
14#include <I2C_device.h>
15
21enum access_word : uint8_t
22{
23 IN,
24 OUT,
25 POLARITY,
26 CONFIG,
27 DRIVE_STRENGTH,
28 LATCH,
29 PULL_UD_EN,
30 PULL_UD_SEL,
31 INT_MASK,
32 INT_STATUS,
33 OUTPUT_PORT_CONFIG,
34 NUM_access_word,
35};
36
44class GPIO_base : public I2C_device
45{
46public:
47 enum board {
48 NONE,
49 ARDUINO_SHIELD,
50 };
51
53 const int n_bits;
54
56 const int n_ports;
57
65 GPIO_base( uint8_t i2c_address, const int nbits, const uint8_t* arp, uint8_t ai );
66
75 GPIO_base( TwoWire& wire, uint8_t i2c_address, const int nbits, const uint8_t* arp, uint8_t ai );
76
78 virtual ~GPIO_base();
79
84 void begin( board env = NONE );
85
94 void output( int port, uint8_t value, uint8_t mask = 0 );
95
102 void output( uint8_t *vp );
103
111 uint8_t input( int port );
112
120 uint8_t* input( uint8_t *vp );
121
130 void config( int port, uint8_t config, uint8_t mask = 0 );
131
138 void config( uint8_t* vp );
139
147 void write_port( access_word w, uint8_t* vp );
148
156 void write_port16( access_word w, uint16_t* vp );
157
166 uint8_t* read_port( access_word w, uint8_t* vp );
167
176 uint16_t* read_port16( access_word w, uint16_t* vp );
177
186 void write_port( access_word w, uint8_t value, int port_num = 0 );
187
196 void write_port16( access_word w, uint16_t value, int port_num = 0 );
197
206 uint8_t read_port( access_word w, int port_num = 0 );
207
216 uint16_t read_port16( access_word w, int port_num = 0 );
217
218 static void print_bin( uint8_t v );
219
220private:
221 const uint8_t* arp;
222 const uint8_t auto_increment;
223 bool endian;
224
225 static constexpr int RESET_PIN = 8;
226 static constexpr int ADDR_PIN = 9;
227
228 void init( void );
229};
230
235class PCA9554 : public GPIO_base
236{
237public:
239 enum reg_num {
240 Input_Port,
241 Output_Port,
242 Polarity_Inversion,
243 Configuration,
244 };
245
246 PCA9554( uint8_t i2c_address = (0x40 >> 1) + 0 );
247 PCA9554( TwoWire& wire, uint8_t i2c_address = (0x40 >> 1) + 0 );
248 virtual ~PCA9554();
249
250 static constexpr uint8_t access_ref[ NUM_access_word ] = {
251 Input_Port, // IN,
252 Output_Port, // OUT
253 Polarity_Inversion, // POLARITY
254 Configuration, // CONFIG
255 0xFF, // DRIVE_STRENGTH ** CANNOT BE USED **
256 0xFF, // LATCHLATCH ** CANNOT BE USED **
257 0xFF, // PULL_UD_EN ** CANNOT BE USED **
258 0xFF, // PULL_UD_SEL ** CANNOT BE USED **
259 0xFF, // INT_MASK ** CANNOT BE USED **
260 0xFF, // INT_STATUS ** CANNOT BE USED **
261 0xFF, // OUTPUT_PORT_CONFIG ** CANNOT BE USED **
262 };
263};
264
269class PCA9555 : public GPIO_base
270{
271public:
273 enum reg_num {
274 Input_Port_0, Input_Port_1,
275 Output_Port_0, Output_Port_1,
276 Polarity_Inversion_Port_0, Polarity_Inversion_Port_1,
277 Configuration_Port_0, Configuration_Port_1,
278 };
279
280 PCA9555( uint8_t i2c_address = (0x40 >> 1) + 0 );
281 PCA9555( TwoWire& wire, uint8_t i2c_address = (0x40 >> 1) + 0 );
282 virtual ~PCA9555();
283
284 static constexpr uint8_t access_ref[ NUM_access_word ] = {
285 Input_Port_0, // IN,
286 Output_Port_0, // OUT
287 Polarity_Inversion_Port_0, // POLARITY
288 Configuration_Port_0, // CONFIG
289 0xFF, // DRIVE_STRENGTH ** CANNOT BE USED **
290 0xFF, // LATCHLATCH ** CANNOT BE USED **
291 0xFF, // PULL_UD_EN ** CANNOT BE USED **
292 0xFF, // PULL_UD_SEL ** CANNOT BE USED **
293 0xFF, // INT_MASK ** CANNOT BE USED **
294 0xFF, // INT_STATUS ** CANNOT BE USED **
295 0xFF, // OUTPUT_PORT_CONFIG ** CANNOT BE USED **
296 };
297};
298
307{
308public:
309 PCAL6xxx_base( uint8_t i2c_address, const int nbits, const uint8_t arp[], uint8_t ai );
310 PCAL6xxx_base( TwoWire& wire, uint8_t i2c_address, const int nbits, const uint8_t arp[], uint8_t ai );
311 virtual ~PCAL6xxx_base();
312};
313
314
320{
321public:
323 enum reg_num {
324 Input_Port,
325 Output_Port,
326 Polarity_Inversion,
327 Configuration,
328 Output_drive_strength_0 = 0x40,
329 Output_drive_strength_1,
330 Input_latch,
331 Pull_up_pull_down_enable,
332 Pull_up_pull_down_selection,
333 Interrupt_mask,
334 Interrupt_status,
335 Output_port_configuration,
336 };
337
338 PCAL6408A( uint8_t i2c_address = (0x40 >> 1) + 0 );
339 PCAL6408A( TwoWire& wire, uint8_t i2c_address = (0x40 >> 1) + 0 );
340 virtual ~PCAL6408A();
341
342 static constexpr uint8_t access_ref[ NUM_access_word ] = {
343 Input_Port, // IN,
344 Output_Port, // OUT
345 Polarity_Inversion, // POLARITY
346 Configuration, // CONFIG
347 Output_drive_strength_0, // DRIVE_STRENGTH
348 Input_latch, // LATCHLATCH
349 Pull_up_pull_down_enable, // PULL_UD_EN
350 Pull_up_pull_down_selection, // PULL_UD_SEL
351 Interrupt_mask, // INT_MASK
352 Interrupt_status, // INT_STATUS
353 Output_port_configuration, // OUTPUT_PORT_CONFIG
354 };
355};
356
362{
363public:
365 enum reg_num {
366 Input_Port_0, Input_Port_1,
367 Output_Port_0, Output_Port_1,
368 Polarity_Inversion_port_0, Polarity_Inversion_port_1,
369 Configuration_port_0, Configuration_port_1,
370 Output_drive_strength_register_0=0x40, Output_drive_strength_register_0B,
371 Output_drive_strength_register_1, Output_drive_strength_register_1B,
372 Input_latch_register_0, Input_latch_register_1,
373 Pull_up_pull_down_enable_register_0, Pull_up_pull_down_enable_register_1,
374 Pull_up_pull_down_selection_register_0, Pull_up_pull_down_selection_register_1,
375 Interrupt_mask_register_0, Interrupt_mask_register_1,
376 Interrupt_status_register_0, Interrupt_status_register_1,
377 Output_port_configuration_register,
378 };
379
380 PCAL6416A( uint8_t i2c_address = (0x40 >> 1) + 0 );
381 PCAL6416A( TwoWire& wire, uint8_t i2c_address = (0x40 >> 1) + 0 );
382 virtual ~PCAL6416A();
383
384 static constexpr uint8_t access_ref[ NUM_access_word ] = {
385 Input_Port_0, // IN,
386 Output_Port_0, // OUT
387 Polarity_Inversion_port_0, // POLARITY
388 Configuration_port_0, // CONFIG
389 Output_drive_strength_register_0, // DRIVE_STRENGTH
390 Input_latch_register_0, // LATCHLATCH
391 Pull_up_pull_down_enable_register_0, // PULL_UD_EN
392 Pull_up_pull_down_selection_register_0, // PULL_UD_SEL
393 Interrupt_mask_register_0, // INT_MASK
394 Interrupt_status_register_0, // INT_STATUS
395 Output_port_configuration_register, // OUTPUT_PORT_CONFIG
396 };
397};
398
404{
405public:
407 enum reg_num {
408 Input_Port_0, Input_Port_1, Input_Port_2, reserved0,
409 Output_Port_0, Output_Port_1, Output_Port_2, reserved1,
410 Polarity_Inversion_port_0, Polarity_Inversion_port_1, Polarity_Inversion_port_2, reserved2,
411 Configuration_port_0, Configuration_port_1, Configuration_port_2,
412 Output_drive_strength_register_port_0A=0x40, Output_drive_strength_register_port_0B,
413 Output_drive_strength_register_port_1A, Output_drive_strength_register_port_1B,
414 Output_drive_strength_register_port_2A, Output_drive_strength_register_port_2B,
415 reserved3, reserved4,
416 Input_latch_register_port_0, Input_latch_register_port_1, Input_latch_register_port_2, reserved5,
417 Pull_up_pull_down_enable_register_port_0, Pull_up_pull_down_enable_register_port_1, Pull_up_pull_down_enable_register_port_2, reserved6,
418 Pull_up_pull_down_selection_register_port_0, Pull_up_pull_down_selection_register_port_1, Pull_up_pull_down_selection_register_port_2, reserved7,
419 Interrupt_mask_register_port_0, Interrupt_mask_register_port_1, Interrupt_mask_register_port_2, reserved8,
420 Interrupt_status_register_port_0, Interrupt_status_register_port_1, Interrupt_status_register_port_2, reserved9,
421 Output_port_configuration_register, reserved10, reserved11, reserved12,
422 Interrupt_edge_register_port_0A, Interrupt_edge_register_port_0B,
423 Interrupt_edge_register_port_1A, Interrupt_edge_register_port_1B,
424 Interrupt_edge_register_port_2A, Interrupt_edge_register_port_2B,
425 reserved13, reserved14,
426 Interrupt_clear_register_port_0, Interrupt_clear_register_port_1, Interrupt_clear_register_port_2, reserved15,
427 Input_status_port_0, Input_status_port_1, Input_status_port_2, reserved16,
428 Individual_pin_output_port_0_configuration_register, Individual_pin_output_port_1_configuration_register, Individual_pin_output_port_2_configuration_register, reserved17,
429 Switch_debounce_enable_0, Switch_debounce_enable_1, Switch_debounce_count,
430 };
431
432 PCAL6524( uint8_t i2c_address = (0x44 >> 1) + 0 );
433 PCAL6524( TwoWire& wire, uint8_t i2c_address = (0x44 >> 1) + 0 );
434 virtual ~PCAL6524();
435
436 static constexpr uint8_t access_ref[ NUM_access_word ] = {
437 Input_Port_0, // IN,
438 Output_Port_0, // OUT
439 Polarity_Inversion_port_0, // POLARITY
440 Configuration_port_0, // CONFIG
441 Output_drive_strength_register_port_0A, // DRIVE_STRENGTH
442 Input_latch_register_port_0, // LATCHLATCH
443 Pull_up_pull_down_enable_register_port_0, // PULL_UD_EN
444 Pull_up_pull_down_selection_register_port_0, // PULL_UD_SEL
445 Interrupt_mask_register_port_0, // INT_MASK
446 Interrupt_status_register_port_0, // INT_STATUS
447 Output_port_configuration_register, // OUTPUT_PORT_CONFIG
448 };
449};
450
456{
457public:
459 enum reg_num {
460 Input_Port_0, Input_Port_1, Input_Port_2, Input_Port_3, Input_Port_4,
461 Output_Port_0, Output_Port_1, Output_Port_2, Output_Port_3, Output_Port_4,
462 Polarity_Inversion_port_0, Polarity_Inversion_port_1, Polarity_Inversion_port_2, Polarity_Inversion_port_3, Polarity_Inversion_port_4,
463 Configuration_port_0, Configuration_port_1, Configuration_port_2, Configuration_port_3, Configuration_port_4,
464 Output_drive_strength_register_port_0A = 0x30, Output_drive_strength_register_port_0B,
465 Output_drive_strength_register_port_1A, Output_drive_strength_register_port_1B,
466 Output_drive_strength_register_port_2A, Output_drive_strength_register_port_2B,
467 Output_drive_strength_register_port_3A, Output_drive_strength_register_port_3B,
468 Output_drive_strength_register_port_4A, reserved0,
469 Input_latch_register_port_0, Input_latch_register_port_1, Input_latch_register_port_2, Input_latch_register_port_3, Input_latch_register_port_4,
470 Pull_up_pull_down_enable_register_port_0, Pull_up_pull_down_enable_register_port_1, Pull_up_pull_down_enable_register_port_2, Pull_up_pull_down_enable_register_port_3, Pull_up_pull_down_enable_register_port_4,
471 Pull_up_pull_down_selection_register_port_0, Pull_up_pull_down_selection_register_port_1, Pull_up_pull_down_selection_register_port_2, Pull_up_pull_down_selection_register_port_3, Pull_up_pull_down_selection_register_port_4,
472 Interrupt_mask_register_port_0, Interrupt_mask_register_port_1, Interrupt_mask_register_port_2, Interrupt_mask_register_port_3, Interrupt_mask_register_port_4,
473 Interrupt_status_register_port_0, Interrupt_status_register_port_1, Interrupt_status_register_port_2, Interrupt_status_register_port_3, Interrupt_status_register_port_4,
474 Output_port_configuration_register,
475 Interrupt_edge_register_port_0A, Interrupt_edge_register_port_0B,
476 Interrupt_edge_register_port_1A, Interrupt_edge_register_port_1B,
477 Interrupt_edge_register_port_2A, Interrupt_edge_register_port_2B,
478 Interrupt_edge_register_port_3A, Interrupt_edge_register_port_3B,
479 Interrupt_edge_register_port_4A, reserved1,
480 Interrupt_clear_register_port_0, Interrupt_clear_register_port_1, Interrupt_clear_register_port_2, Interrupt_clear_register_port_3, Interrupt_clear_register_port_4,
481 Input_status_port_0, Input_status_port_1, Input_status_port_2, Input_status_port_3, Input_status_port_4,
482 Individual_pin_output_port_0_configuration_register, Individual_pin_output_port_1_configuration_register, Individual_pin_output_port_2_configuration_register, Individual_pin_output_port_3_configuration_register, Individual_pin_output_port_4_configuration_register,
483 Switch_debounce_enable_0, Switch_debounce_enable_1,
484 Switch_debounce_count,
485 };
486
487 PCAL6534( uint8_t i2c_address = (0x44 >> 1) + 0 );
488 PCAL6534( TwoWire& wire, uint8_t i2c_address = (0x44 >> 1) + 0 );
489 virtual ~PCAL6534();
490
491 static constexpr uint8_t access_ref[ NUM_access_word ] = {
492 Input_Port_0, // IN,
493 Output_Port_0, // OUT
494 Polarity_Inversion_port_0, // POLARITY
495 Configuration_port_0, // CONFIG
496 Output_drive_strength_register_port_0A, // DRIVE_STRENGTH
497 Input_latch_register_port_0, // LATCHLATCH
498 Pull_up_pull_down_enable_register_port_0, // PULL_UD_EN
499 Pull_up_pull_down_selection_register_port_0, // PULL_UD_SEL
500 Interrupt_mask_register_port_0, // INT_MASK
501 Interrupt_status_register_port_0, // INT_STATUS
502 Output_port_configuration_register, // OUTPUT_PORT_CONFIG
503 };
504};
505
506#endif // ARDUINO_GPIO_NXP_ARD_H
uint16_t * read_port16(access_word w, uint16_t *vp)
Definition: GPIO_NXP.cpp:138
const int n_bits
Definition: GPIO_NXP.h:53
void config(int port, uint8_t config, uint8_t mask=0)
Definition: GPIO_NXP.cpp:80
const int n_ports
Definition: GPIO_NXP.h:56
virtual ~GPIO_base()
Definition: GPIO_NXP.cpp:33
void write_port16(access_word w, uint16_t *vp)
Definition: GPIO_NXP.cpp:104
void output(int port, uint8_t value, uint8_t mask=0)
Definition: GPIO_NXP.cpp:55
void write_port(access_word w, uint8_t *vp)
Definition: GPIO_NXP.cpp:93
void begin(board env=NONE)
Definition: GPIO_NXP.cpp:37
uint8_t input(int port)
Definition: GPIO_NXP.cpp:68
uint8_t * read_port(access_word w, uint8_t *vp)
Definition: GPIO_NXP.cpp:125