GPIO_NXP_Arduino 0.2.0
GPIO device operation sample code for Arduino
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GPIO_NXP.h
1
8#ifndef ARDUINO_GPIO_NXP_ARD_H
9#define ARDUINO_GPIO_NXP_ARD_H
10
11#include <Arduino.h>
12#include <stdint.h>
13
14#include <I2C_device.h>
15
21enum access_word : uint8_t
22{
23 IN,
24 OUT,
25 POLARITY,
26 CONFIG,
27 DRIVE_STRENGTH,
28 LATCH,
29 PULL_UD_EN,
30 PULL_UD_SEL,
31 INT_MASK,
32 INT_STATUS,
33 OUTPUT_PORT_CONFIG,
34 NUM_access_word,
35};
36
44class GPIO_base : public I2C_device
45{
46public:
47 enum board {
48 NONE,
49 ARDUINO_SHIELD,
50 };
51
53 const int n_bits;
54
56 const int n_ports;
57
65 GPIO_base( uint8_t i2c_address, const int nbits, const uint8_t* arp, uint8_t ai );
66
68 virtual ~GPIO_base();
69
74 void begin( board env = NONE );
75
84 void output( int port, uint8_t value, uint8_t mask = 0 );
85
92 void output( uint8_t *vp );
93
101 uint8_t input( int port );
102
110 uint8_t* input( uint8_t *vp );
111
120 void config( int port, uint8_t config, uint8_t mask = 0 );
121
128 void config( uint8_t* vp );
129
137 void write_port( access_word w, uint8_t* vp );
138
146 void write_port16( access_word w, uint16_t* vp );
147
156 uint8_t* read_port( access_word w, uint8_t* vp );
157
166 uint16_t* read_port16( access_word w, uint16_t* vp );
167
176 void write_port( access_word w, uint8_t value, int port_num = 0 );
177
186 void write_port16( access_word w, uint16_t value, int port_num = 0 );
187
196 uint8_t read_port( access_word w, int port_num = 0 );
197
206 uint16_t read_port16( access_word w, int port_num = 0 );
207
208 static void print_bin( uint8_t v );
209
210private:
211 const uint8_t* arp;
212 const uint8_t auto_increment;
213 bool endian;
214
215 static constexpr int RESET_PIN = 8;
216 static constexpr int ADDR_PIN = 9;
217};
218
223class PCA9554 : public GPIO_base
224{
225public:
227 enum reg_num {
228 Input_Port,
229 Output_Port,
230 Polarity_Inversion,
231 Configuration,
232 };
233
234 PCA9554( uint8_t i2c_address = (0x40 >> 1) + 0 );
235 virtual ~PCA9554();
236
237 static constexpr uint8_t access_ref[ NUM_access_word ] = {
238 Input_Port, // IN,
239 Output_Port, // OUT
240 Polarity_Inversion, // POLARITY
241 Configuration, // CONFIG
242 0xFF, // DRIVE_STRENGTH ** CANNOT BE USED **
243 0xFF, // LATCHLATCH ** CANNOT BE USED **
244 0xFF, // PULL_UD_EN ** CANNOT BE USED **
245 0xFF, // PULL_UD_SEL ** CANNOT BE USED **
246 0xFF, // INT_MASK ** CANNOT BE USED **
247 0xFF, // INT_STATUS ** CANNOT BE USED **
248 0xFF, // OUTPUT_PORT_CONFIG ** CANNOT BE USED **
249 };
250};
251
256class PCA9555 : public GPIO_base
257{
258public:
260 enum reg_num {
261 Input_Port_0, Input_Port_1,
262 Output_Port_0, Output_Port_1,
263 Polarity_Inversion_Port_0, Polarity_Inversion_Port_1,
264 Configuration_Port_0, Configuration_Port_1,
265 };
266
267 PCA9555( uint8_t i2c_address = (0x40 >> 1) + 0 );
268 virtual ~PCA9555();
269
270 static constexpr uint8_t access_ref[ NUM_access_word ] = {
271 Input_Port_0, // IN,
272 Output_Port_0, // OUT
273 Polarity_Inversion_Port_0, // POLARITY
274 Configuration_Port_0, // CONFIG
275 0xFF, // DRIVE_STRENGTH ** CANNOT BE USED **
276 0xFF, // LATCHLATCH ** CANNOT BE USED **
277 0xFF, // PULL_UD_EN ** CANNOT BE USED **
278 0xFF, // PULL_UD_SEL ** CANNOT BE USED **
279 0xFF, // INT_MASK ** CANNOT BE USED **
280 0xFF, // INT_STATUS ** CANNOT BE USED **
281 0xFF, // OUTPUT_PORT_CONFIG ** CANNOT BE USED **
282 };
283};
284
293{
294public:
295 PCAL6xxx_base( uint8_t i2c_address, const int nbits, const uint8_t arp[], uint8_t ai );
296 virtual ~PCAL6xxx_base();
297};
298
299
305{
306public:
308 enum reg_num {
309 Input_Port,
310 Output_Port,
311 Polarity_Inversion,
312 Configuration,
313 Output_drive_strength_0 = 0x40,
314 Output_drive_strength_1,
315 Input_latch,
316 Pull_up_pull_down_enable,
317 Pull_up_pull_down_selection,
318 Interrupt_mask,
319 Interrupt_status,
320 Output_port_configuration,
321 };
322
323 PCAL6408A( uint8_t i2c_address = (0x40 >> 1) + 0 );
324 virtual ~PCAL6408A();
325
326 static constexpr uint8_t access_ref[ NUM_access_word ] = {
327 Input_Port, // IN,
328 Output_Port, // OUT
329 Polarity_Inversion, // POLARITY
330 Configuration, // CONFIG
331 Output_drive_strength_0, // DRIVE_STRENGTH
332 Input_latch, // LATCHLATCH
333 Pull_up_pull_down_enable, // PULL_UD_EN
334 Pull_up_pull_down_selection, // PULL_UD_SEL
335 Interrupt_mask, // INT_MASK
336 Interrupt_status, // INT_STATUS
337 Output_port_configuration, // OUTPUT_PORT_CONFIG
338 };
339};
340
346{
347public:
349 enum reg_num {
350 Input_Port_0, Input_Port_1,
351 Output_Port_0, Output_Port_1,
352 Polarity_Inversion_port_0, Polarity_Inversion_port_1,
353 Configuration_port_0, Configuration_port_1,
354 Output_drive_strength_register_0=0x40, Output_drive_strength_register_0B,
355 Output_drive_strength_register_1, Output_drive_strength_register_1B,
356 Input_latch_register_0, Input_latch_register_1,
357 Pull_up_pull_down_enable_register_0, Pull_up_pull_down_enable_register_1,
358 Pull_up_pull_down_selection_register_0, Pull_up_pull_down_selection_register_1,
359 Interrupt_mask_register_0, Interrupt_mask_register_1,
360 Interrupt_status_register_0, Interrupt_status_register_1,
361 Output_port_configuration_register,
362 };
363
364 PCAL6416A( uint8_t i2c_address = (0x40 >> 1) + 0 );
365 virtual ~PCAL6416A();
366
367 static constexpr uint8_t access_ref[ NUM_access_word ] = {
368 Input_Port_0, // IN,
369 Output_Port_0, // OUT
370 Polarity_Inversion_port_0, // POLARITY
371 Configuration_port_0, // CONFIG
372 Output_drive_strength_register_0, // DRIVE_STRENGTH
373 Input_latch_register_0, // LATCHLATCH
374 Pull_up_pull_down_enable_register_0, // PULL_UD_EN
375 Pull_up_pull_down_selection_register_0, // PULL_UD_SEL
376 Interrupt_mask_register_0, // INT_MASK
377 Interrupt_status_register_0, // INT_STATUS
378 Output_port_configuration_register, // OUTPUT_PORT_CONFIG
379 };
380};
381
387{
388public:
390 enum reg_num {
391 Input_Port_0, Input_Port_1, Input_Port_2, reserved0,
392 Output_Port_0, Output_Port_1, Output_Port_2, reserved1,
393 Polarity_Inversion_port_0, Polarity_Inversion_port_1, Polarity_Inversion_port_2, reserved2,
394 Configuration_port_0, Configuration_port_1, Configuration_port_2,
395 Output_drive_strength_register_port_0A=0x40, Output_drive_strength_register_port_0B,
396 Output_drive_strength_register_port_1A, Output_drive_strength_register_port_1B,
397 Output_drive_strength_register_port_2A, Output_drive_strength_register_port_2B,
398 reserved3, reserved4,
399 Input_latch_register_port_0, Input_latch_register_port_1, Input_latch_register_port_2, reserved5,
400 Pull_up_pull_down_enable_register_port_0, Pull_up_pull_down_enable_register_port_1, Pull_up_pull_down_enable_register_port_2, reserved6,
401 Pull_up_pull_down_selection_register_port_0, Pull_up_pull_down_selection_register_port_1, Pull_up_pull_down_selection_register_port_2, reserved7,
402 Interrupt_mask_register_port_0, Interrupt_mask_register_port_1, Interrupt_mask_register_port_2, reserved8,
403 Interrupt_status_register_port_0, Interrupt_status_register_port_1, Interrupt_status_register_port_2, reserved9,
404 Output_port_configuration_register, reserved10, reserved11, reserved12,
405 Interrupt_edge_register_port_0A, Interrupt_edge_register_port_0B,
406 Interrupt_edge_register_port_1A, Interrupt_edge_register_port_1B,
407 Interrupt_edge_register_port_2A, Interrupt_edge_register_port_2B,
408 reserved13, reserved14,
409 Interrupt_clear_register_port_0, Interrupt_clear_register_port_1, Interrupt_clear_register_port_2, reserved15,
410 Input_status_port_0, Input_status_port_1, Input_status_port_2, reserved16,
411 Individual_pin_output_port_0_configuration_register, Individual_pin_output_port_1_configuration_register, Individual_pin_output_port_2_configuration_register, reserved17,
412 Switch_debounce_enable_0, Switch_debounce_enable_1, Switch_debounce_count,
413 };
414
415 PCAL6524( uint8_t i2c_address = (0x44 >> 1) + 0 );
416 virtual ~PCAL6524();
417
418 static constexpr uint8_t access_ref[ NUM_access_word ] = {
419 Input_Port_0, // IN,
420 Output_Port_0, // OUT
421 Polarity_Inversion_port_0, // POLARITY
422 Configuration_port_0, // CONFIG
423 Output_drive_strength_register_port_0A, // DRIVE_STRENGTH
424 Input_latch_register_port_0, // LATCHLATCH
425 Pull_up_pull_down_enable_register_port_0, // PULL_UD_EN
426 Pull_up_pull_down_selection_register_port_0, // PULL_UD_SEL
427 Interrupt_mask_register_port_0, // INT_MASK
428 Interrupt_status_register_port_0, // INT_STATUS
429 Output_port_configuration_register, // OUTPUT_PORT_CONFIG
430 };
431};
432
438{
439public:
441 enum reg_num {
442 Input_Port_0, Input_Port_1, Input_Port_2, Input_Port_3, Input_Port_4,
443 Output_Port_0, Output_Port_1, Output_Port_2, Output_Port_3, Output_Port_4,
444 Polarity_Inversion_port_0, Polarity_Inversion_port_1, Polarity_Inversion_port_2, Polarity_Inversion_port_3, Polarity_Inversion_port_4,
445 Configuration_port_0, Configuration_port_1, Configuration_port_2, Configuration_port_3, Configuration_port_4,
446 Output_drive_strength_register_port_0A = 0x30, Output_drive_strength_register_port_0B,
447 Output_drive_strength_register_port_1A, Output_drive_strength_register_port_1B,
448 Output_drive_strength_register_port_2A, Output_drive_strength_register_port_2B,
449 Output_drive_strength_register_port_3A, Output_drive_strength_register_port_3B,
450 Output_drive_strength_register_port_4A, reserved0,
451 Input_latch_register_port_0, Input_latch_register_port_1, Input_latch_register_port_2, Input_latch_register_port_3, Input_latch_register_port_4,
452 Pull_up_pull_down_enable_register_port_0, Pull_up_pull_down_enable_register_port_1, Pull_up_pull_down_enable_register_port_2, Pull_up_pull_down_enable_register_port_3, Pull_up_pull_down_enable_register_port_4,
453 Pull_up_pull_down_selection_register_port_0, Pull_up_pull_down_selection_register_port_1, Pull_up_pull_down_selection_register_port_2, Pull_up_pull_down_selection_register_port_3, Pull_up_pull_down_selection_register_port_4,
454 Interrupt_mask_register_port_0, Interrupt_mask_register_port_1, Interrupt_mask_register_port_2, Interrupt_mask_register_port_3, Interrupt_mask_register_port_4,
455 Interrupt_status_register_port_0, Interrupt_status_register_port_1, Interrupt_status_register_port_2, Interrupt_status_register_port_3, Interrupt_status_register_port_4,
456 Output_port_configuration_register,
457 Interrupt_edge_register_port_0A, Interrupt_edge_register_port_0B,
458 Interrupt_edge_register_port_1A, Interrupt_edge_register_port_1B,
459 Interrupt_edge_register_port_2A, Interrupt_edge_register_port_2B,
460 Interrupt_edge_register_port_3A, Interrupt_edge_register_port_3B,
461 Interrupt_edge_register_port_4A, reserved1,
462 Interrupt_clear_register_port_0, Interrupt_clear_register_port_1, Interrupt_clear_register_port_2, Interrupt_clear_register_port_3, Interrupt_clear_register_port_4,
463 Input_status_port_0, Input_status_port_1, Input_status_port_2, Input_status_port_3, Input_status_port_4,
464 Individual_pin_output_port_0_configuration_register, Individual_pin_output_port_1_configuration_register, Individual_pin_output_port_2_configuration_register, Individual_pin_output_port_3_configuration_register, Individual_pin_output_port_4_configuration_register,
465 Switch_debounce_enable_0, Switch_debounce_enable_1,
466 Switch_debounce_count,
467 };
468
469 PCAL6534( uint8_t i2c_address = (0x44 >> 1) + 0 );
470 virtual ~PCAL6534();
471
472 static constexpr uint8_t access_ref[ NUM_access_word ] = {
473 Input_Port_0, // IN,
474 Output_Port_0, // OUT
475 Polarity_Inversion_port_0, // POLARITY
476 Configuration_port_0, // CONFIG
477 Output_drive_strength_register_port_0A, // DRIVE_STRENGTH
478 Input_latch_register_port_0, // LATCHLATCH
479 Pull_up_pull_down_enable_register_port_0, // PULL_UD_EN
480 Pull_up_pull_down_selection_register_port_0, // PULL_UD_SEL
481 Interrupt_mask_register_port_0, // INT_MASK
482 Interrupt_status_register_port_0, // INT_STATUS
483 Output_port_configuration_register, // OUTPUT_PORT_CONFIG
484 };
485};
486
487#endif // ARDUINO_GPIO_NXP_ARD_H
uint16_t * read_port16(access_word w, uint16_t *vp)
Definition: GPIO_NXP.cpp:123
const int n_bits
Definition: GPIO_NXP.h:53
void config(int port, uint8_t config, uint8_t mask=0)
Definition: GPIO_NXP.cpp:65
const int n_ports
Definition: GPIO_NXP.h:56
virtual ~GPIO_base()
Definition: GPIO_NXP.cpp:18
void write_port16(access_word w, uint16_t *vp)
Definition: GPIO_NXP.cpp:89
void output(int port, uint8_t value, uint8_t mask=0)
Definition: GPIO_NXP.cpp:40
void write_port(access_word w, uint8_t *vp)
Definition: GPIO_NXP.cpp:78
void begin(board env=NONE)
Definition: GPIO_NXP.cpp:22
uint8_t input(int port)
Definition: GPIO_NXP.cpp:53
uint8_t * read_port(access_word w, uint8_t *vp)
Definition: GPIO_NXP.cpp:110