// ─────────────────────────────────────────────────────────────────────────────
// Full-update waveform LUT for the SSD1680 (OTP bypass)
//
// Sourced from Good Display's own Arduino sample code for the GDEM0097T61
// and cross-checked against the 2.9" SSD1680 implementation already in
// ESPHome (waveshare_epaper.cpp, GDEY029T94 / 2.9in GDEW029T5 drivers).
//
// The SSD1680 LUT register (0x32) accepts 153 bytes:
//   - 60 bytes  VS (voltage source) waveform: 5 phases × 12 bytes each
//   - 84 bytes  TP/SR/RP groups: 12 groups × 7 bytes each
//   - 9 bytes   Frame Rate (FR) + XON settings
// ─────────────────────────────────────────────────────────────────────────────
static const uint8_t FULL_UPDATE_LUT[] = {
  // VS (voltage source) waveform — 5 × 12 bytes
  // Bit pairs define the Source and VCOM voltage level in each phase
  // for each of 5 Look Up Tables
  0x80, 0x48, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,  // L0 (BB)
  0x40, 0x48, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,  // L1 (BW)
  0x80, 0x48, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,  // L2 (WB)
  0x40, 0x48, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,  // L3 (WW)
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,  // L4 (VCOM)
  // TP / SR / RP — 12 groups × 7 bytes
  // TP - phase length (Total Phase?)
  // SR - state repeat
  // RP - repeat count
  /*
  TPnA  TPnB  SRnAB TPnC  TPnD  SRnCD RPn
  */
  0x43, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  // FR — 6 bytes : Nibbles defining Frame Rate for group n : FRn
  0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
  // XON — 3 bytes : Bit pairs for Gate Scan selection : XONnAB XONnCD
  0x00, 0x00, 0x00,
};
static_assert(sizeof(FULL_UPDATE_LUT) == 153, "LUT must be 153 bytes");