PU2CLR RDA5807 Arduino Library  1.0.1
Arduino Library for RDA5807 Devices - By Ricardo Lima Caratti
RDA5807.h
Go to the documentation of this file.
1 
2 /**
3  * @mainpage PU2CLR rda Arduino Library
4  * @brief PU2CLR rda Arduino Library implementation. <br>
5  * @details This library works with I2C protocol and can provide an easier interface for controlling the RDA5807M devices.<br>
6  * @details This is an Arduino library was implemented based on RDA5807M - SINGLE-CHIP BROADCAST FMRADIO TUNER document from RDA microeletronics.
7  *
8  * @details IMPORTANT:
9  * @details The RDA5807M can be accessed by using two I2C bus address.
10  * @details If you need to access a specific register, use the 0x11 buss adress.
11  * @details If you need to access a set o register, use the 0x10 buss adress.
12  *
13  * @see RDA5807M - SINGLE-CHIP BROADCAST FMRADIO TUNER; page 5.
14  * @see the methods setRegister, setAllRegisters, getRegister and getStatusRegisters
15  *
16  * This library can be freely distributed using the MIT Free Software model.
17  * Copyright(c) 2020 Ricardo Lima Caratti.
18  * Contact : pu2clr @gmail.com
19  *
20  */
21 
22 #include <Arduino.h>
23 #include <Wire.h>
24 
25 #define MAX_DELAY_AFTER_OSCILLATOR 500 // Max delay after the crystal oscilator becomes active
26 
27 
28 #define I2C_ADDR_DIRECT_ACCESS 0x11 //!< Can be used to access a given register at a time.
29 #define I2C_ADDR_FULL_ACCESS 0x10 //!< Can be used to access a set of register at a time.
30 
31 
32 #define OSCILLATOR_TYPE_CRYSTAL 0 //!< Crystal
33 #define OSCILLATOR_TYPE_REFCLK 1 //!< Reference clock
34 
35 #define CLOCK_32K 0 //!< 32.768kHz
36 #define CLOCK_12M 1 //!< 12Mhz
37 #define CLOCK_13M 2 //!< 13Mhz
38 #define CLOCK_19_2M 3 //!< 19.2Mhz
39 #define CLOCK_24M 5 //!< 24Mhz
40 #define CLOCK_26M 6 //!< 26Mhz
41 #define CLOCK_38_4M 7 //!< 38.4Mhz
42 
43 #define RDS_STANDARD 0 //!< RDS Mode.
44 #define RDS_VERBOSE 1 //!< RDS Mode.
45 
46 #define RDA_FM_BAND_USA_EU 0 //!< 87.5–108 MHz (US / Europe, Default)
47 #define RDA_FM_BAND_JAPAN_WIDE 1 //!< 76–91 MHz (Japan wide band)
48 #define RDA_FM_BAND_WORLD 2 //!< 76–108 MHz (world wide)
49 #define RDA_FM_BAND_SPECIAL 3 //!< 65 –76 MHz(East Europe) or 50 - 65MHz(see bit 9 of gegister 0x06)
50 
51 #define RDA_SEEK_WRAP 0 //!< Wrap at the upper or lower band limit and continue seeking
52 #define RDA_SEEK_STOP 1 //!< Stop seeking at the upper or lower band limit
53 #define RDA_SEEK_DOWN 0 //!< Seek Up
54 #define RDA_SEEK_UP 1 //!< Seek Down
55 
56 #define REG00 0x00
57 #define REG02 0x02
58 #define REG03 0x03
59 #define REG04 0x04
60 #define REG05 0x05
61 #define REG06 0x06
62 #define REG07 0x07
63 #define REG0A 0x0A
64 #define REG0B 0x0B
65 #define REG0C 0x0C
66 #define REG0D 0x0D
67 #define REG0E 0x0E
68 #define REG0F 0x0F
69 
70 /**
71  * @defgroup GA01 Union, Structure and Defined Data Types
72  * @brief rda Defined Data Types
73  * @details Defined Data Types is a way to represent the rda registers information
74  * @details The information shown here was extracted from Datasheet:
75  * @details rda stereo FM digital tuning radio documentation.
76  */
77 
78 /**
79  * @ingroup GA01
80  * @brief Register 0x00
81  *
82  */
83  typedef union {
84  struct {
85  uint8_t CHIPID: 8; //!< Chip ifdef
86  uint8_t DUMMY: 8;
87  } refined;
89 } rda_reg00;
90 
91 /**
92  * @ingroup GA01
93  * @brief Register 0x01 - Dummy
94  * @details It is not documented by the RDA.
95  */
96 typedef union
97 {
98  struct
99  {
100  uint8_t lowByte;
101  uint8_t highByte;
102  } refined;
104 } rda_reg01;
105 
106 /**
107  * @ingroup GA01
108  * @brief Register 0x02 - Basic setup: RESET configuration;
109  * @details Clock type configuration; seek operation; Sterio/Mono; Bass; and Audio configuration
110  * @details The RDA5807M is RESET itself when power up. You also can use soft reset by triggering SOFT_RESET bit to 1.
111  * @details Seek begins in the direction specified by SEEKUP and ends when a channel is found, or the entire band has been searched.
112  * @details The SEEK bit is set low and the STC bit is set high when the seek operation completes.
113  * @details RCLK NON-CALIBRATE MODE. if 0=RCLK clock is always supply; if 1=RCLK clock is not always supply when FM work ( when 1, RDA5807M can’t directly support -20 °C ~70 °C temperature.
114  * @details Only suppory ±20°C temperature swing from tune point).
115  *
116  * Clock CLK_MODE table
117  *
118  * | Value | Clock |
119  * | ----- | --------- |
120  * | 000 | 32.768kHz |
121  * | 001 | 12Mhz |
122  * | 101 | 24Mhz |
123  * | 010 | 13Mhz |
124  * | 110 | 26Mhz |
125  * | 011 | 19.2Mhz |
126  * | 111 | 38.4Mhz |
127  */
128 typedef union {
129  struct
130  {
131  uint8_t ENABLE : 1; //!< Power Up Enable; 0 = Disabled; 1 = Enabled
132  uint8_t SOFT_RESET : 1; //!< Soft reset; If 0, not reset; If 1, reset.
133  uint8_t NEW_METHOD : 1; //!< New Demodulate Method Enable, can improve 0 the receive sensitivity about 1dB.
134  uint8_t RDS_EN : 1; //!< RDS/RBDS enable; If 1, rds/rbds enable
135  uint8_t CLK_MODE : 3; //!< See table above
136  uint8_t SKMODE : 1; //!< Seek Mode; 0 = wrap at the upper or lower band limit and continue seeking; 1 = stop seeking at the upper or lower band limit
137  uint8_t SEEK : 1; //!< Seek; 0 = Disable stop seek; 1 = Enable;
138  uint8_t SEEKUP : 1; //!< Seek Up; 0 = Seek down; 1 = Seek up
139  uint8_t RCLK_DIRECT_IN : 1; //!< RCLK clock use the directly input mode. 1 = enable
140  uint8_t NON_CALIBRATE : 1; //!< 0=RCLK clock is always supply; 1=RCLK clock is not always supply when FM work
141  uint8_t BASS : 1; //!< Bass Boost; 0 = Disabled; 1 = Bass boost enabled
142  uint8_t MONO : 1; //!< Mono Select; 0 = Stereo; 1 = Force mono
143  uint8_t DMUTE : 1; //!< Mute Disable; 0 = Mute; 1 = Normal operation
144  uint8_t DHIZ : 1; //!< Audio Output High-Z Disable; 0 = High impedance; 1 = Normal operation
145  } refined;
147 } rda_reg02;
148 
149 /**
150  * @ingroup GA01
151  * @brief Register 0x03
152  * @details Receiver configuratio
153  * @details The tune operation begins when the TUNE bit is set high. The STC bit is set high when the tune operation completes.
154  * @details The tune bit is reset to low automatically when the tune operation completes
155  *
156  * Channel space table
157  *
158  * | Value | Description |
159  * | ----- | ----------- |
160  * | 00 | 100KHz |
161  * | 01 | 200KHz |
162  * | 10 | 50KHz |
163  * | 11 | 25KHz |
164  *
165  *
166  * FM band table
167  *
168  * | Value | Description |
169  * | ----- | --------------------------- |
170  * | 00 | 87–108 MHz (US/Europe) |
171  * | 01 | 76–91 MHz (Japan) |
172  * | 10 | 76–108 MHz (world wide) |
173  * | 11 | 65 –76 MHz (East Europe) or 50-65MHz (see bit 9 of gegister 0x06) |
174  *
175  * Channel select table
176  *
177  * | BAND | Description |
178  * | ------ | -------------------------------------------------- |
179  * | 0 | Frequency = Channel Spacing (kHz) x CHAN+ 87.0 MHz |
180  * | 1 or 2 | Frequency = Channel Spacing (kHz) x CHAN + 76.0 MHz |
181  * | 3 | Frequency = Channel Spacing (kHz) x CHAN + 65.0 MHz |
182  * IMPORTANT: CHAN is updated after a seek operation.
183  *
184  */
185 typedef union {
186  struct
187  {
188  uint16_t SPACE: 2; //!< See Channel space table above
189  uint16_t BAND: 2; //!< Seet band table above
190  uint16_t TUNE : 1; //!< Tune; 0 = Disable; 1 = Enable
191  uint16_t DIRECT_MODE : 1; //!< Directly Control Mode, Only used when test
192  uint16_t CHAN : 10; //!< Channel Select.
193  } refined;
195 } rda_reg03;
196 
197 /**
198  * @ingroup GA01
199  * @brief Register 0x04
200  * @details Receiver properties
201  * @details Volume scale is logarithmic When 0000, output mute and output impedance is very large
202  * @details Setting STCIEN = 1 will generate a low pulse on GPIO2 when the interrupt occurs.
203  */
204 typedef union {
205  struct
206  {
207  uint8_t GPIO1 : 2; //!< General Purpose I/O 1. when gpio_sel=01; 00 = High impedance; 01 = Reserved; 10 = Low; 11 = High
208  uint8_t GPIO2 : 2; //!< General Purpose I/O 2. when gpio_sel=01; 00 = High impedance; 01 = Reserved; 10 = Low; 11 = High
209  uint8_t GPIO3 : 2; //!< General Purpose I/O 1. when gpio_sel=01; 00 = High impedance; 01 = Mono/Stereo indicator (ST); 10 = Low; 11 = High
210  uint8_t I2S_ENABLE : 1; //!< I2S enable; 0 = disabled; 1 = enabled.
211  uint8_t RSVD1 : 1;
212  uint8_t AFCD : 1; //!< AFC disable; If 0, afc work; If 1, afc disabled.
213  uint8_t SOFTMUTE_EN : 1; //!< If 1, softmute enable.
214  uint8_t RDS_FIFO_CLR : 1; //!< 1 = clear RDS fifo
215  uint8_t DE : 1; //!< De-emphasis; 0 = 75 μs; 1 = 50 μs
216  uint8_t RDS_FIFO_EN : 1; //!< 1 = RDS fifo mode enable.
217  uint8_t RBDS : 1; //!< 1 = RBDS mode enable; 0 = RDS mode only
218  uint8_t STCIEN : 1; //!< Seek/Tune Complete Interrupt Enable; 0 = Disable Interrupt; 1 = Enable Interrupt;
219  uint8_t RSVD2 : 1;
220  } refined;
222 } rda_reg04;
223 
224 /**
225  * @ingroup GA01
226  * @brief Register 0x05
227  */
228 typedef union {
229  struct
230  {
231  uint8_t VOLUME : 4; //!< DAC Gain Control Bits (Volume); 0000 = min volume; 1111 = max volume.
232  uint8_t LNA_ICSEL_BIT : 2; //!< Lna working current bit: 00=1.8mA; 01=2.1mA; 10=2.5mA; 11=3.0mA.
233  uint8_t LNA_PORT_SEL : 2; //!< LNA input port selection bit: 00: no input; 01: LNAN; 10: LNAP; 11: dual port input
234  uint8_t SEEKTH : 4; //!< Seek SNR Threshold value
235  uint8_t RSVD2 : 1;
236  uint8_t SEEK_MODE : 2; //!< Default value is 00; When = 10, will add the RSSI seek mode
237  uint8_t INT_MODE : 1; //!< If 0, generate 5ms interrupt; If 1, interrupt last until read reg0CH action occurs.
238  } refined;
240 } rda_reg05;
241 
242 /**
243  * @ingroup GA01
244  * @brief Register 0x06
245  *
246  * I2S_SW_CNT values table
247  *
248  * | Value | Description |
249  * | ------- | ------------------ |
250  * | 0b1000 | WS_STEP_48 |
251  * | 0b0111 | WS_STEP=44.1kbps |
252  * | 0b0110 | WS_STEP=32kbps |
253  * | 0b0101 | WS_STEP=24kbps |
254  * | 0b0100 | WS_STEP=22.05kbps |
255  * | 0b0011 | WS_STEP=16kbps |
256  * | 0b0010 | WS_STEP=12kbps |
257  * | 0b0001 | WS_STEP=11.025kbps |
258  * | 0b0000 | WS_STEP=8kbps |
259  */
260 typedef union {
261  struct
262  {
263  uint8_t R_DELY : 1; //!< If 1, R channel data delay 1T.
264  uint8_t L_DELY : 1; //!< If 1, L channel data delay 1T.
265  uint8_t SCLK_O_EDGE : 1; //!< If 1, invert sclk output when as master.
266  uint8_t SW_O_EDGE : 1; //!< If 1, invert ws output when as master.
267  uint8_t I2S_SW_CNT : 4; //!< Only valid in master mode. See table above
268  uint8_t WS_I_EDGE : 1; //!< If 0, use normal ws internally; If 1, inverte ws internally.
269  uint8_t DATA_SIGNED : 1; //!< If 0, I2S output unsigned 16-bit audio data. If 1, I2S output signed 16-bit audio data.
270  uint8_t SCLK_I_EDGE : 1; //!< If 0, use normal sclk internally;If 1, inverte sclk internally.
271  uint8_t WS_LR : 1; //!< Ws relation to l/r channel; If 0, ws=0 ->r, ws=1 ->l; If 1, ws=0 ->l, ws=1 ->r.
272  uint8_t SLAVE_MASTER : 1; //!< I2S slave or master; 1 = slave; 0 = master.
273  uint8_t OPEN_MODE : 2; //!< Open reserved register mode; 11=open behind registers writing function others: only open behind registers reading function.
274  uint8_t RSVD : 1;
275  } refined;
277 } rda_reg06;
278 
279 /**
280  * @ingroup GA01
281  * @brief Register 0x07
282  */
283 typedef union {
284  struct
285  {
286  uint8_t FREQ_MODE : 1; //!< If 1, then freq setting changed. Freq = 76000(or 87000) kHz + freq_direct (08H) kHz.
287  uint8_t SOFTBLEND_EN : 1; //!< If 1, Softblend enable
288  uint8_t SEEK_TH_OLD : 6; //!< Seek threshold for old seek mode, Valid when Seek_Mode=001
289  uint8_t RSVD1 : 1;
290  uint8_t MODE_50_60 : 1; //!< 1 = 65~76 MHz; 0 = 50~76MHz
291  uint8_t TH_SOFRBLEND : 5; //!< Threshold for noise soft blend setting, unit 2dB (default 0b10000).
292  uint8_t RSVD2 : 1;
293  } refined;
295 } rda_reg07;
296 
297 /**
298  * @ingroup GA01
299  * @brief Register 0x08 - Direct Frequency
300  * @details Valid when freq_mode = 1
301  * @details Freq = 7600(or 8700) kHz + freq_direct (08H) kHz.
302  * @details Value to be stores is frequency - 7600 or 8700
303  */
304 typedef union
305 {
306  struct
307  {
308  uint8_t lowByte;
309  uint8_t highByte;
310  } refined;
312 } rda_reg08;
313 
314 
315 /**
316  * @ingroup GA01
317  * @brief Register 0x0A - Device current status
318  * @details The seek fail flag (SF) is set when the seek operation fails to find a channel with an RSSI level greater than SEEKTH[5:0].
319  * @details The seek/tune complete (STC) flag is set when the seek or tune operation completes.
320  *
321  *
322  * Channel table
323  *
324  * | BAND | Description |
325  * | ------ | -------------------------------------------------- |
326  * | 0 | Frequency = Channel Spacing (kHz) x CHAN+ 87.0 MHz |
327  * | 1 or 2 | Frequency = Channel Spacing (kHz) x CHAN + 76.0 MHz |
328  * | 3 | Frequency = Channel Spacing (kHz) x CHAN + 65.0 MHz |
329  *
330  */
331 typedef union {
332  struct
333  {
334  uint16_t READCHAN : 10; //!< See Channel table . See table above
335  uint16_t ST : 1; //!< Stereo Indicator; 0 = Mono; 1 = Stereo
336  uint16_t BLK_E : 1; //!< When RDS enable: 1 = Block E has been found; 0 = no Block E has been found
337  uint16_t RDSS : 1; //!< RDS Synchronization; 0 = RDS decoder not synchronized(default); 1 = RDS decoder synchronized; Available only in RDS Verbose mode
338  uint16_t SF : 1; //!< Seek Fail. 0 = Seek successful; 1 = Seek failure;
339  uint16_t STC : 1; //!< Seek/Tune Complete. 0 = Not complete; 1 = Complete;
340  uint16_t RDSR : 1; //!< RDS ready; 0 = No RDS/RBDS group ready(default); 1 = New RDS/RBDS group ready.
341  } refined;
343 } rda_reg0a;
344 
345 /**
346  * @ingroup GA01
347  * @brief Register 0x0B
348  * @details Current RDS and device status
349  *
350  * Errors Level table (Block Errors Level of RDS_DATA_0 and RDS_DATA_1.
351  * Always read as Errors Level of RDS BLOCKs A and B (in RDS mode ) or E (in RBDS mode when ABCD_E flag is 1).
352  *
353  * | Value | Description |
354  * | ----- | ----------- |
355  * | 00 | 0 errors requiring correction |
356  * | 01 | 1~2 errors requiring correction |
357  * | 10 | 3~5 errors requiring correction |
358  * | 10 | 6+ errors or error in checkword, correction not possible |
359  *
360  */
361 typedef union {
362  struct
363  {
364  uint8_t BLERB : 2; //!< Block Errors Level of RDS_DATA_1
365  uint8_t BLERA : 2; //!< Block Errors Level of RDS_DATA_0
366  uint8_t ABCD_E : 1; //!< 1 = the block id of register 0cH,0dH,0eH,0fH is E; 0 = the block id of register 0cH, 0dH, 0eH,0fH is A, B, C, D
367  uint8_t RSVD1 : 2;
368  uint8_t FM_READY : 1; //!< 1=ready; 0=not ready.
369  uint8_t FM_TRUE : 1; //!< 1 = the current channel is a station; 0 = the current channel is not a station.
370  uint8_t RSSI : 7; //!< RSSI; 000000 = min; 111111 = max; RSSI scale is logarithmic.
371  } refined;
373 } rda_reg0b;
374 
375 
376 /**
377  * @ingroup GA01
378  * @brief Register 0x0C
379  * @details BLOCK A ( in RDS mode) or BLOCK E (in RBDS mode when ABCD_E flag is 1)
380  *
381  */
382 typedef union {
383  struct {
384  uint8_t lowByte;
385  uint8_t highByte;
386  } refined;
387  uint16_t RDSA; //!< BLOCK A ( in RDS mode) or BLOCK E (in RBDS mode when ABCD_E flag is 1)
388 } rda_reg0c;
389 
390 /**
391  * @ingroup GA01
392  * @brief Register 0x0D
393  * @details BLOCK B ( in RDS mode) or BLOCK E (in RBDS mode when ABCD_E flag is 1)
394  *
395  */
396 typedef union
397 {
398  struct
399  {
400  uint8_t lowByte;
401  uint8_t highByte;
402  } refined;
404 } rda_reg0d;
405 
406 
407 /**
408  * @ingroup GA01
409  * @brief Register 0x0E
410  * @details BLOCK C ( in RDS mode) or BLOCK E (in RBDS mode when ABCD_E flag is 1)
411  *
412  */
413 typedef union
414 {
415  struct
416  {
417  uint8_t lowByte;
418  uint8_t highByte;
419  } refined;
421 } rda_reg0e;
422 
423 /**
424  * @ingroup GA01
425  * @brief Register 0x0F
426  * @details BLOCK D ( in RDS mode) or BLOCK E (in RBDS mode when ABCD_E flag is 1)
427  *
428  */
429 typedef union
430 {
431  struct
432  {
433  uint8_t lowByte;
434  uint8_t highByte;
435  } refined;
437 } rda_reg0f;
438 
439 /**
440  * @ingroup GA01
441  * @brief RDS Block B data type
442  *
443  * @details For GCC on System-V ABI on 386-compatible (32-bit processors), the following stands:
444  *
445  * 1) Bit-fields are allocated from right to left (least to most significant).
446  * 2) A bit-field must entirely reside in a storage unit appropriate for its declared type.
447  * Thus a bit-field never crosses its unit boundary.
448  * 3) Bit-fields may share a storage unit with other struct/union members, including members that are not bit-fields.
449  * Of course, struct members occupy different parts of the storage unit.
450  * 4) Unnamed bit-fields' types do not affect the alignment of a structure or union, although individual
451  * bit-fields' member offsets obey the alignment constraints.
452  *
453  * @see also https://en.wikipedia.org/wiki/Radio_Data_System
454  */
455 typedef union {
456  struct
457  {
458  uint8_t address : 2; // Depends on Group Type and Version codes. If 0A or 0B it is the Text Segment Address.
459  uint8_t DI : 1; // Decoder Controll bit
460  uint8_t MS : 1; // Music/Speech
461  uint8_t TA : 1; // Traffic Announcement
462  uint8_t programType : 5; // PTY (Program Type) code
463  uint8_t trafficProgramCode : 1; // (TP) => 0 = No Traffic Alerts; 1 = Station gives Traffic Alerts
464  uint8_t versionCode : 1; // (B0) => 0=A; 1=B
465  uint8_t groupType : 4; // Group Type code.
466  } group0;
467  struct
468  {
469  uint8_t address : 4; // Depends on Group Type and Version codes. If 2A or 2B it is the Text Segment Address.
470  uint8_t textABFlag : 1; // Do something if it chanhes from binary "0" to binary "1" or vice-versa
471  uint8_t programType : 5; // PTY (Program Type) code
472  uint8_t trafficProgramCode : 1; // (TP) => 0 = No Traffic Alerts; 1 = Station gives Traffic Alerts
473  uint8_t versionCode : 1; // (B0) => 0=A; 1=B
474  uint8_t groupType : 4; // Group Type code.
475  } group2;
476  struct
477  {
478  uint8_t content : 4; // Depends on Group Type and Version codes.
479  uint8_t textABFlag : 1; // Do something if it chanhes from binary "0" to binary "1" or vice-versa
480  uint8_t programType : 5; // PTY (Program Type) code
481  uint8_t trafficProgramCode : 1; // (TP) => 0 = No Traffic Alerts; 1 = Station gives Traffic Alerts
482  uint8_t versionCode : 1; // (B0) => 0=A; 1=B
483  uint8_t groupType : 4; // Group Type code.
484  } refined;
485  rda_reg0d blockB;
486 } rds_blockb;
487 
488 /**
489  * @ingroup GA01
490  * Group RDS type 4A ( RDS Date and Time)
491  * When group type 4A is used by the station, it shall be transmitted every minute according to EN 50067.
492  * This Structure uses blocks 2,3 and 5 (B,C,D)
493  *
494  * ATTENTION:
495  * To make it compatible with 8, 16 and 32 bits platforms and avoid Crosses boundary, it was necessary to
496  * split minute and hour representation.
497  */
498 typedef union {
499  struct
500  {
501  uint8_t offset : 5; // Local Time Offset
502  uint8_t offset_sense : 1; // Local Offset Sign ( 0 = + , 1 = - )
503  uint8_t minute1 : 2; // UTC Minutes - 2 bits less significant (void “Crosses boundary”).
504  uint8_t minute2 : 4; // UTC Minutes - 4 bits more significant (void “Crosses boundary”)
505  uint8_t hour1 : 4; // UTC Hours - 4 bits less significant (void “Crosses boundary”)
506  uint8_t hour2 : 1; // UTC Hours - 4 bits more significant (void “Crosses boundary”)
507  uint32_t mjd : 17; // Modified Julian Day Code
508  } refined;
510 } rda_rds_date_time;
511 
512 /**
513  * @ingroup GA01
514  * @brief Converts 16 bits word to two bytes
515  */
516 typedef union {
517  struct
518  {
519  uint8_t lowByte;
520  uint8_t highByte;
521  } refined;
523 } word16_to_bytes;
524 
525 /**
526  * @ingroup GA01
527  * @brief KT0915 Class
528  * @details This class implements all functions that will help you to control the KT0915 devices.
529  *
530  * @author PU2CLR - Ricardo Lima Caratti
531  */
532 class RDA5807 {
533 
534  private:
535 
536  uint16_t shadowStatusRegisters[6]; //!< shadow status registers
537  uint16_t shadowRegisters[9]; //!< shadow configuration registers
538 
539  // Shadow device configuration register references (writable registers)
540  rda_reg00 *reg00 = (rda_reg00 *)&shadowRegisters[0]; // REG01;
541  rda_reg01 *reg01 = (rda_reg01 *)&shadowRegisters[1]; // REG01;
542  rda_reg02 *reg02 = (rda_reg02 *)&shadowRegisters[2]; // REG02;
543  rda_reg03 *reg03 = (rda_reg03 *)&shadowRegisters[3]; // REG03;
544  rda_reg04 *reg04 = (rda_reg04 *)&shadowRegisters[4]; // REG04;
545  rda_reg05 *reg05 = (rda_reg05 *)&shadowRegisters[5]; // REG05;
546  rda_reg06 *reg06 = (rda_reg06 *)&shadowRegisters[6]; // REG06;
547  rda_reg07 *reg07 = (rda_reg07 *)&shadowRegisters[7]; // REG07;
548  rda_reg08 *reg08 = (rda_reg08 *)&shadowRegisters[8]; // REG08;
549 
550  // Shadow device status register references (read only registers)
551  rda_reg0a *reg0a = (rda_reg0a *)&shadowStatusRegisters[0]; // REG0A;
552  rda_reg0b *reg0b = (rda_reg0b *)&shadowStatusRegisters[1]; // REG0B;
553  rda_reg0c *reg0c = (rda_reg0c *)&shadowStatusRegisters[2]; // REG0C;
554  rda_reg0d *reg0d = (rda_reg0d *)&shadowStatusRegisters[3]; // REG0D;
555  rda_reg0e *reg0e = (rda_reg0e *)&shadowStatusRegisters[4]; // REG0E;
556  rda_reg0f *reg0f = (rda_reg0f *)&shadowStatusRegisters[5]; // REG0F;
557 
558 
559  uint16_t startBand[4] = {8700, 7600, 7600, 6500};
560  uint16_t fmSpace[4] = {100, 200, 50, 25};
561 
562  protected:
565 
566  int resetPin;
571 
572  int gpio1Control = -1; //!< Can be used to add control to the system via GPIO1 pin
573  int gpio2Control = -1; //!< Can be used to add control to the system via GPIO2 pin
574  int gpio3Control = -1; //!< Can be used to add control to the system via GPIO3 pin
575 
578 
580 
581  public :
582 
583  /**
584  * @brief Set the Delay After Crystal On (default 500ms)
585  *
586  * @param ms_value Value in milliseconds
587  */
588  inline void setDelayAfterCrystalOn(uint8_t ms_value) { maxDelayAftarCrystalOn = ms_value; };
589 
590  /**
591  * @ingroup GA03
592  * @brief Sets alternatives I2C bus address
593  * @details You do not need use this function on RDA5807M
594  * @param directAccess
595  * @param fullAccess
596  */
597  inline void setI2CBusAddrs(int directAccess, int fullAccess) {
598  this->deviceAddressDirectAccess = directAccess;
599  this->deviceAddressFullAccess = fullAccess;
600  }
601 
602  void getStatusRegisters();
603  void *getStatus(uint8_t reg);
604  void setAllRegisters();
605  void setRegister(uint8_t reg, uint16_t value);
606 
607  void setGpio(uint8_t gpioPin, uint8_t gpioSetup = 0, int mcuPin = -1);
608 
609  void waitAndFinishTune();
610 
611  void softReset();
612 
613  void powerUp();
614  void powerDown();
615 
616  void setup(uint8_t clock_type = CLOCK_32K, uint8_t oscillator_type = OSCILLATOR_TYPE_CRYSTAL);
617 
618  void setFrequency(uint16_t frequency);
622  void setChannel(uint16_t channel);
623  void seek(uint8_t seek_mode, uint8_t direction);
624  void setSeekThreshold(uint8_t value);
625 
626  void setBand(uint8_t band = 1);
627  void setSpace(uint8_t space = 0);
628  int getRssi();
629 
630  void setSoftmute(bool value);
631 
632  void setMono(bool value);
633 
634  void setRDS(bool value);
635  void setRBDS(bool value);
636  void clearRdsFifo();
637 
639 
640  void setMute(bool value);
641  void setVolume(uint8_t value);
642  uint8_t getVolume();
643  void setVolumeUp();
644  void setVolumeDown();
645 
646  void setFmDeemphasis(uint8_t de);
647 };
RDA5807::powerUp
void powerUp()
Powers the receiver on.
Definition: RDA5807.cpp:177
RDA5807::waitAndFinishTune
void waitAndFinishTune()
Waits for Seek or Tune finish.
Definition: RDA5807.cpp:154
RDA5807::getStatusRegisters
void getStatusRegisters()
Gets all current device status and RDS information registers (From 0x0A to 0x0F)
Definition: RDA5807.cpp:62
rda_reg0f::RDSD
uint16_t RDSD
Definition: RDA5807.h:436
RDA5807::setRegister
void setRegister(uint8_t reg, uint16_t value)
Sets a given value to a specific device register.
Definition: RDA5807.cpp:136
rda_rds_date_time::raw
uint8_t raw[6]
Definition: RDA5807.h:509
RDA5807::setSoftmute
void setSoftmute(bool value)
Sets Soft Mute Enable or disable.
Definition: RDA5807.cpp:374
rda_reg04::raw
uint16_t raw
Definition: RDA5807.h:221
RDA5807::setVolume
void setVolume(uint8_t value)
Sets the audio volume level.
Definition: RDA5807.cpp:450
RDA5807::currentFrequency
uint16_t currentFrequency
Definition: RDA5807.h:567
RDA5807::setRBDS
void setRBDS(bool value)
Sets the RBDS operation.
Definition: RDA5807.cpp:425
RDA5807::setup
void setup(uint8_t clock_type=CLOCK_32K, uint8_t oscillator_type=OSCILLATOR_TYPE_CRYSTAL)
Starts the device.
Definition: RDA5807.cpp:218
RDA5807::gpio3Control
int gpio3Control
Can be used to add control to the system via GPIO3 pin.
Definition: RDA5807.h:574
REG04
#define REG04
Definition: RDA5807.h:59
RDA5807::setDelayAfterCrystalOn
void setDelayAfterCrystalOn(uint8_t ms_value)
Set the Delay After Crystal On (default 500ms)
Definition: RDA5807.h:588
word16_to_bytes::raw
uint16_t raw
Definition: RDA5807.h:522
RDA5807::gpio2Control
int gpio2Control
Can be used to add control to the system via GPIO2 pin.
Definition: RDA5807.h:573
RDA5807::clearRdsFifo
void clearRdsFifo()
Clears RDS/RBDS FIFO.
Definition: RDA5807.cpp:437
REG05
#define REG05
Definition: RDA5807.h:60
RDA5807::setMono
void setMono(bool value)
Sets audio Mono or stereo.
Definition: RDA5807.cpp:399
RDA5807::currentVolume
uint8_t currentVolume
Definition: RDA5807.h:570
rda_reg02::raw
uint16_t raw
Definition: RDA5807.h:146
RDA5807::setSeekThreshold
void setSeekThreshold(uint8_t value)
Sets RSSI Seek Threshold.
Definition: RDA5807.cpp:308
RDA5807::getRealFrequency
uint16_t getRealFrequency()
Definition: RDA5807.cpp:284
rda_reg0e::RDSC
uint16_t RDSC
Definition: RDA5807.h:420
RDA5807::resetPin
int resetPin
Definition: RDA5807.h:566
rda_reg08::raw
uint16_t raw
Definition: RDA5807.h:311
rda_reg03::raw
uint16_t raw
Definition: RDA5807.h:194
RDA5807::powerDown
void powerDown()
Definition: RDA5807.cpp:206
RDA5807::getRealChannel
uint16_t getRealChannel()
Definition: RDA5807.cpp:272
RDA5807::seek
void seek(uint8_t seek_mode, uint8_t direction)
Seek function.
Definition: RDA5807.cpp:295
rds_blockb::blockB
rda_reg0d blockB
Definition: RDA5807.h:485
RDA5807::setI2CBusAddrs
void setI2CBusAddrs(int directAccess, int fullAccess)
Sets alternatives I2C bus address.
Definition: RDA5807.h:597
RDA5807::currentFMSpace
uint8_t currentFMSpace
Definition: RDA5807.h:569
REG0B
#define REG0B
Definition: RDA5807.h:64
I2C_ADDR_DIRECT_ACCESS
#define I2C_ADDR_DIRECT_ACCESS
Can be used to access a given register at a time.
Definition: RDA5807.h:28
rda_reg06::raw
uint16_t raw
Definition: RDA5807.h:276
RDA5807::clockType
uint8_t clockType
Definition: RDA5807.h:576
I2C_ADDR_FULL_ACCESS
#define I2C_ADDR_FULL_ACCESS
Can be used to access a set of register at a time.
Definition: RDA5807.h:29
RDA5807::setFrequency
void setFrequency(uint16_t frequency)
Sets the frequency.
Definition: RDA5807.cpp:250
RDA5807::getFrequency
uint16_t getFrequency()
Gets the current frequency.
Definition: RDA5807.cpp:262
RDA5807::deviceAddressFullAccess
int deviceAddressFullAccess
Definition: RDA5807.h:564
RDA5807::getRssi
int getRssi()
Gets the current Rssi.
Definition: RDA5807.cpp:363
RDA5807::setVolumeUp
void setVolumeUp()
Increments the audio volume.
Definition: RDA5807.cpp:475
RDA5807::setMute
void setMute(bool value)
Sets Audio mute or unmute.
Definition: RDA5807.cpp:387
RDA5807::maxDelayAftarCrystalOn
uint16_t maxDelayAftarCrystalOn
Definition: RDA5807.h:579
RDA5807::getVolume
uint8_t getVolume()
Gets the current audio volume level.
Definition: RDA5807.cpp:465
RDA5807::deviceAddressDirectAccess
int deviceAddressDirectAccess
Definition: RDA5807.h:563
RDA5807::setGpio
void setGpio(uint8_t gpioPin, uint8_t gpioSetup=0, int mcuPin=-1)
Set the Device GPIO pins.
Definition: RDA5807.cpp:32
RDA5807::setAllRegisters
void setAllRegisters()
Sets values to the device registers from 0x02 to 0x07.
Definition: RDA5807.cpp:112
RDA5807::softReset
void softReset()
Resets the device.
Definition: RDA5807.cpp:167
rda_reg05::raw
uint16_t raw
Definition: RDA5807.h:239
REG0A
#define REG0A
Definition: RDA5807.h:63
REG03
#define REG03
Definition: RDA5807.h:58
RDA5807::gpio1Control
int gpio1Control
Can be used to add control to the system via GPIO1 pin.
Definition: RDA5807.h:572
RDA5807::setBand
void setBand(uint8_t band=1)
Sets the FM band. See table below.
Definition: RDA5807.cpp:329
rda_reg0a::raw
uint16_t raw
Definition: RDA5807.h:342
RDA5807::setFmDeemphasis
void setFmDeemphasis(uint8_t de)
Sets De-emphasis.
Definition: RDA5807.cpp:517
RDA5807::getStatus
void * getStatus(uint8_t reg)
Gets the register content of a given status register (from 0x0A to 0x0F)
Definition: RDA5807.cpp:84
rda_reg0b::raw
uint16_t raw
Definition: RDA5807.h:372
rda_reg07::raw
uint16_t raw
Definition: RDA5807.h:294
RDA5807::getDeviceId
uint8_t getDeviceId()
Gets the Device identification.
Definition: RDA5807.cpp:505
RDA5807::setVolumeDown
void setVolumeDown()
Decrements the audio volume.
Definition: RDA5807.cpp:489
MAX_DELAY_AFTER_OSCILLATOR
#define MAX_DELAY_AFTER_OSCILLATOR
Definition: RDA5807.h:25
RDA5807::setRDS
void setRDS(bool value)
Sets the RDS operation.
Definition: RDA5807.cpp:412
RDA5807::oscillatorType
uint8_t oscillatorType
Definition: RDA5807.h:577
rda_reg0d::RDSB
uint16_t RDSB
Definition: RDA5807.h:403
RDA5807::setChannel
void setChannel(uint16_t channel)
Sets the channel.
Definition: RDA5807.cpp:234
CLOCK_32K
#define CLOCK_32K
32.768kHz
Definition: RDA5807.h:35
REG02
#define REG02
Definition: RDA5807.h:57
rda_reg0c::RDSA
uint16_t RDSA
BLOCK A ( in RDS mode) or BLOCK E (in RBDS mode when ABCD_E flag is 1)
Definition: RDA5807.h:387
RDA5807::setSpace
void setSpace(uint8_t space=0)
Sets the FM channel space.
Definition: RDA5807.cpp:350
RDA5807::currentFMBand
uint8_t currentFMBand
Definition: RDA5807.h:568
rda_reg00::raw
uint16_t raw
Definition: RDA5807.h:88
OSCILLATOR_TYPE_CRYSTAL
#define OSCILLATOR_TYPE_CRYSTAL
Crystal.
Definition: RDA5807.h:32
rda_reg01::raw
uint16_t raw
Definition: RDA5807.h:103