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MatrixMiniR4 1.1.4
Matrix Mini R4 Arduino Library API Documentation
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Handling TCS34725 Color Sensor support (currently replace by MXColor). More...
Go to the source code of this file.
Classes | |
class | Adafruit_TCS34725 |
Class that stores state and functions for interacting with TCS34725 Color Sensor. More... | |
Enumerations | |
enum | tcs34725Gain_t { TCS34725_GAIN_1X = 0x00 , TCS34725_GAIN_4X = 0x01 , TCS34725_GAIN_16X = 0x02 , TCS34725_GAIN_60X = 0x03 } |
Handling TCS34725 Color Sensor support (currently replace by MXColor).
Definition in file MiniR4TCS34725.h.
#define TCS34725_ADDRESS (0x29) |
I2C address
Definition at line 16 of file MiniR4TCS34725.h.
#define TCS34725_AIHTH (0x07) |
Clear channel upper interrupt threshold (higher byte)
Definition at line 33 of file MiniR4TCS34725.h.
#define TCS34725_AIHTL (0x06) |
Clear channel upper interrupt threshold (lower byte)
Definition at line 32 of file MiniR4TCS34725.h.
#define TCS34725_AILTH (0x05) |
Clear channel lower interrupt threshold (higher byte)
Definition at line 31 of file MiniR4TCS34725.h.
#define TCS34725_AILTL (0x04) |
Clear channel lower interrupt threshold (lower byte)
Definition at line 30 of file MiniR4TCS34725.h.
#define TCS34725_ATIME (0x01) |
Integration time
Definition at line 25 of file MiniR4TCS34725.h.
#define TCS34725_BDATAH (0x1B) |
Blue channel data high byte
Definition at line 101 of file MiniR4TCS34725.h.
#define TCS34725_BDATAL (0x1A) |
Blue channel data low byte
Definition at line 100 of file MiniR4TCS34725.h.
#define TCS34725_CDATAH (0x15) |
Clear channel data high byte
Definition at line 95 of file MiniR4TCS34725.h.
#define TCS34725_CDATAL (0x14) |
Clear channel data low byte
Definition at line 94 of file MiniR4TCS34725.h.
#define TCS34725_COMMAND_BIT (0x80) |
Command bit
Definition at line 17 of file MiniR4TCS34725.h.
#define TCS34725_CONFIG (0x0D) |
Configuration
Definition at line 83 of file MiniR4TCS34725.h.
#define TCS34725_CONFIG_WLONG (0x02) |
Choose between short and long (12x) wait times via \ TCS34725_WTIME
Definition at line 84 of file MiniR4TCS34725.h.
#define TCS34725_CONTROL (0x0F) |
Set the gain level for the sensor
Definition at line 87 of file MiniR4TCS34725.h.
#define TCS34725_ENABLE (0x00) |
Interrupt Enable register
Definition at line 18 of file MiniR4TCS34725.h.
#define TCS34725_ENABLE_AEN (0x02) |
RGBC Enable - Writing 1 actives the ADC, 0 disables it
Definition at line 21 of file MiniR4TCS34725.h.
#define TCS34725_ENABLE_AIEN (0x10) |
RGBC Interrupt Enable
Definition at line 19 of file MiniR4TCS34725.h.
#define TCS34725_ENABLE_PON (0x01) |
Power on - Writing 1 activates the internal oscillator, 0 \ disables it
Definition at line 22 of file MiniR4TCS34725.h.
#define TCS34725_ENABLE_WEN (0x08) |
Wait Enable - Writing 1 activates the wait timer
Definition at line 20 of file MiniR4TCS34725.h.
#define TCS34725_GDATAH (0x19) |
Green channel data high byte
Definition at line 99 of file MiniR4TCS34725.h.
#define TCS34725_GDATAL (0x18) |
Green channel data low byte
Definition at line 98 of file MiniR4TCS34725.h.
#define TCS34725_ID (0x12) |
0x44 = TCS34721/TCS34725, 0x4D = TCS34723/TCS34727
Definition at line 88 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_101MS (0xD6) |
100.8ms - 42 cycles - Max Count: 43008
Definition at line 112 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_120MS (0xCE) |
120.0ms - 50 cycles - Max Count: 51200
Definition at line 113 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_154MS (0xC0) |
153.6ms - 64 cycles - Max Count: 65535
Definition at line 114 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_180MS (0xB5) |
180.0ms - 75 cycles - Max Count: 65535
Definition at line 115 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_199MS (0xAD) |
199.2ms - 83 cycles - Max Count: 65535
Definition at line 116 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_240MS (0x9C) |
240.0ms - 100 cycles - Max Count: 65535
Definition at line 117 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_24MS (0xF6) |
24.0ms - 10 cycles - Max Count: 10240
Definition at line 109 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_2_4MS (0xFF) |
Integration time settings for TCS34725 2.4ms - 1 cycle - Max Count: 1024
Definition at line 108 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_300MS (0x83) |
300.0ms - 125 cycles - Max Count: 65535
Definition at line 118 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_360MS (0x6A) |
360.0ms - 150 cycles - Max Count: 65535
Definition at line 119 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_401MS (0x59) |
400.8ms - 167 cycles - Max Count: 65535
Definition at line 120 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_420MS (0x51) |
420.0ms - 175 cycles - Max Count: 65535
Definition at line 121 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_480MS (0x38) |
480.0ms - 200 cycles - Max Count: 65535
Definition at line 122 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_499MS (0x30) |
499.2ms - 208 cycles - Max Count: 65535
Definition at line 123 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_50MS (0xEB) |
50.4ms - 21 cycles - Max Count: 21504
Definition at line 110 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_540MS (0x1F) |
540.0ms - 225 cycles - Max Count: 65535
Definition at line 124 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_600MS (0x06) |
600.0ms - 250 cycles - Max Count: 65535
Definition at line 125 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_60MS (0xE7) |
60.0ms - 25 cycles - Max Count: 25700
Definition at line 111 of file MiniR4TCS34725.h.
#define TCS34725_INTEGRATIONTIME_614MS (0x00) |
614.4ms - 256 cycles - Max Count: 65535
Definition at line 126 of file MiniR4TCS34725.h.
#define TCS34725_PERS (0x0C) |
Persistence register - basic SW filtering mechanism for \ interrupts
Definition at line 34 of file MiniR4TCS34725.h.
#define TCS34725_PERS_10_CYCLE (0b0101) |
10 clean channel values outside threshold range generates an \ interrupt
Definition at line 50 of file MiniR4TCS34725.h.
#define TCS34725_PERS_15_CYCLE (0b0110) |
15 clean channel values outside threshold range generates an \ interrupt
Definition at line 53 of file MiniR4TCS34725.h.
#define TCS34725_PERS_1_CYCLE (0b0001) |
1 clean channel value outside threshold range generates an \ interrupt
Definition at line 38 of file MiniR4TCS34725.h.
#define TCS34725_PERS_20_CYCLE (0b0111) |
20 clean channel values outside threshold range generates an \ interrupt
Definition at line 56 of file MiniR4TCS34725.h.
#define TCS34725_PERS_25_CYCLE (0b1000) |
25 clean channel values outside threshold range generates an \ interrupt
Definition at line 59 of file MiniR4TCS34725.h.
#define TCS34725_PERS_2_CYCLE (0b0010) |
2 clean channel values outside threshold range generates an \ interrupt
Definition at line 41 of file MiniR4TCS34725.h.
#define TCS34725_PERS_30_CYCLE (0b1001) |
30 clean channel values outside threshold range generates an \ interrupt
Definition at line 62 of file MiniR4TCS34725.h.
#define TCS34725_PERS_35_CYCLE (0b1010) |
35 clean channel values outside threshold range generates an \ interrupt
Definition at line 65 of file MiniR4TCS34725.h.
#define TCS34725_PERS_3_CYCLE (0b0011) |
3 clean channel values outside threshold range generates an \ interrupt
Definition at line 44 of file MiniR4TCS34725.h.
#define TCS34725_PERS_40_CYCLE (0b1011) |
40 clean channel values outside threshold range generates an \ interrupt
Definition at line 68 of file MiniR4TCS34725.h.
#define TCS34725_PERS_45_CYCLE (0b1100) |
45 clean channel values outside threshold range generates an \ interrupt
Definition at line 71 of file MiniR4TCS34725.h.
#define TCS34725_PERS_50_CYCLE (0b1101) |
50 clean channel values outside threshold range generates an \ interrupt
Definition at line 74 of file MiniR4TCS34725.h.
#define TCS34725_PERS_55_CYCLE (0b1110) |
55 clean channel values outside threshold range generates an \ interrupt
Definition at line 77 of file MiniR4TCS34725.h.
#define TCS34725_PERS_5_CYCLE (0b0100) |
5 clean channel values outside threshold range generates an \ interrupt
Definition at line 47 of file MiniR4TCS34725.h.
#define TCS34725_PERS_60_CYCLE (0b1111) |
60 clean channel values outside threshold range generates an \ interrupt
Definition at line 80 of file MiniR4TCS34725.h.
#define TCS34725_PERS_NONE (0b0000) |
Every RGBC cycle generates an interrupt
Definition at line 37 of file MiniR4TCS34725.h.
#define TCS34725_RDATAH (0x17) |
Red channel data high byte
Definition at line 97 of file MiniR4TCS34725.h.
#define TCS34725_RDATAL (0x16) |
Red channel data low byte
Definition at line 96 of file MiniR4TCS34725.h.
#define TCS34725_STATUS (0x13) |
Device status
Definition at line 89 of file MiniR4TCS34725.h.
#define TCS34725_STATUS_AINT (0x10) |
RGBC Clean channel interrupt
Definition at line 90 of file MiniR4TCS34725.h.
#define TCS34725_STATUS_AVALID (0x01) |
Indicates that the RGBC channels have completed an integration \ cycle
Definition at line 91 of file MiniR4TCS34725.h.
#define TCS34725_WTIME (0x03) |
Wait time (if TCS34725_ENABLE_WEN is asserted)
Definition at line 26 of file MiniR4TCS34725.h.
#define TCS34725_WTIME_204MS (0xAB) |
WLONG0 = 204ms WLONG1 = 2.45s
Definition at line 28 of file MiniR4TCS34725.h.
#define TCS34725_WTIME_2_4MS (0xFF) |
WLONG0 = 2.4ms WLONG1 = 0.029s
Definition at line 27 of file MiniR4TCS34725.h.
#define TCS34725_WTIME_614MS (0x00) |
WLONG0 = 614ms WLONG1 = 7.4s
Definition at line 29 of file MiniR4TCS34725.h.
enum tcs34725Gain_t |
Gain settings for TCS34725
Enumerator | |
---|---|
TCS34725_GAIN_1X | No gain |
TCS34725_GAIN_4X | 4x gain |
TCS34725_GAIN_16X | 16x gain |
TCS34725_GAIN_60X | 60x gain |
Definition at line 129 of file MiniR4TCS34725.h.