#pragma once

// IWYU pragma: private

// ok no namespace fl

/// @file is_avr.h
/// Centralized AVR platform detection macros
/// Defines FL_IS_AVR, FL_IS_AVR_ATMEGA, and FL_IS_AVR_ATTINY for use throughout the codebase
/// This eliminates the need for repeated long lists of #if defined(__AVR_ATmega...) checks

// ============================================================================
// FL_IS_AVR - General AVR platform detection
// ============================================================================
#if defined(__AVR__)
#define FL_IS_AVR
#endif

// ============================================================================
// FL_IS_AVR_ATMEGA - ATmega family detection (classic Timer1-based chips)
// Includes all classic ATmega variants: ATmega328P, ATmega2560, ATmega32U4, etc.
// EXCLUDES megaAVR 0-series/1-series (e.g., ATmega4809) - they use TCB timers
// ============================================================================
#if defined(__AVR_ATmega328P__) || defined(__AVR_ATmega328PB__) || \
    defined(__AVR_ATmega328__) || defined(__AVR_ATmega168P__) || \
    defined(__AVR_ATmega168__) || defined(__AVR_ATmega8__) || \
    defined(__AVR_ATmega8A__) || \
    defined(__AVR_ATmega2560__) || defined(__AVR_ATmega1280__) || \
    defined(__AVR_ATmega32U4__) || \
    defined(__AVR_ATmega1284__) || defined(__AVR_ATmega1284P__) || \
    defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644__) || \
    defined(__AVR_ATmega32__) || defined(__AVR_ATmega16__) || \
    defined(__AVR_ATmega128__) || defined(__AVR_ATmega64__) || \
    defined(__AVR_ATmega32U2__) || defined(__AVR_ATmega16U2__) || \
    defined(__AVR_ATmega8U2__) || \
    defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB646__) || \
    defined(__AVR_AT90USB162__) || defined(__AVR_AT90USB82__) || \
    defined(__AVR_ATmega128RFA1__) || defined(__AVR_ATmega256RFR2__)
#define FL_IS_AVR_ATMEGA
#endif

// ============================================================================
// FL_IS_AVR_ATMEGA_328P - ATmega328P family detection (Arduino UNO/Nano)
// Includes: ATmega328P, ATmega328PB, ATmega328, ATmega168P, ATmega168, ATmega8
// ============================================================================
#if defined(__AVR_ATmega328P__) || defined(__AVR_ATmega328PB__) || \
    defined(__AVR_ATmega328__) || defined(__AVR_ATmega168P__) || \
    defined(__AVR_ATmega168__) || defined(__AVR_ATmega8__) || \
    defined(__AVR_ATmega8A__)
#define FL_IS_AVR_ATMEGA_328P
#endif

// ============================================================================
// FL_IS_AVR_ATMEGA_2560 - ATmega2560/1280 family detection (Arduino Mega)
// Includes: ATmega2560, ATmega1280
// ============================================================================
#if defined(__AVR_ATmega2560__) || defined(__AVR_ATmega1280__)
#define FL_IS_AVR_ATMEGA_2560
#endif

// ============================================================================
// FL_IS_AVR_MEGAAVR - megaAVR 0-series/1-series detection
// These are modern AVR chips with different peripherals (TCB timers, no Timer1)
// Includes: ATmega4809 (Nano Every), ATmega4808, ATmega3209, etc.
// These chips are NOT compatible with classic ATmega Timer1-based code
// ============================================================================
#if defined(__AVR_ATmega4809__) || defined(__AVR_ATmega4808__) || \
    defined(__AVR_ATmega3209__) || defined(__AVR_ATmega3208__) || \
    defined(__AVR_ATmega1609__) || defined(__AVR_ATmega1608__) || \
    defined(__AVR_ATmega809__) || defined(__AVR_ATmega808__)
#define FL_IS_AVR_MEGAAVR
#endif

// ============================================================================
// FL_IS_AVR_ATTINY - ATtiny family detection
// Includes both classic ATtiny (85, 84, etc.) and modern tinyAVR (412, 1614, etc.)
// ============================================================================
#if defined(__AVR_ATtiny13__) || defined(__AVR_ATtiny13A__) || \
    defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) || \
    defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__) || \
    defined(__AVR_ATtiny48__) || defined(__AVR_ATtiny87__) || defined(__AVR_ATtiny88__) || \
    defined(__AVR_ATtiny167__) || \
    defined(__AVR_ATtiny261__) || defined(__AVR_ATtiny441__) || defined(__AVR_ATtiny841__) || defined(__AVR_ATtiny861__) || \
    defined(__AVR_ATtiny2313__) || defined(__AVR_ATtiny2313A__) || defined(__AVR_ATtiny4313__) || \
    defined(__AVR_ATtinyX41__) || \
    defined(__AVR_ATtiny202__) || defined(__AVR_ATtiny204__) || \
    defined(__AVR_ATtiny212__) || defined(__AVR_ATtiny214__) || \
    defined(__AVR_ATtiny402__) || defined(__AVR_ATtiny404__) || \
    defined(__AVR_ATtiny406__) || defined(__AVR_ATtiny407__) || \
    defined(__AVR_ATtiny412__) || defined(__AVR_ATtiny414__) || \
    defined(__AVR_ATtiny416__) || defined(__AVR_ATtiny417__) || \
    defined(__AVR_ATtiny1604__) || defined(__AVR_ATtiny1616__) || \
    defined(__AVR_ATtinyxy4__) || defined(__AVR_ATtinyxy6__) || \
    defined(__AVR_ATtinyxy7__) || defined(__AVR_ATtinyxy2__) || \
    defined(ARDUINO_AVR_DIGISPARK) || defined(ARDUINO_AVR_DIGISPARKPRO) || \
    defined(IS_BEAN)
#define FL_IS_AVR_ATTINY
#endif

// ============================================================================
// FL_IS_AVR_ATTINY_MODERN - Modern tinyAVR 0/1/2-series with PORT_t registers
// These chips use PORTA.OUT/DIR/IN style port access (not classic PORTB/DDRB)
// Includes: ATtinyxy2, ATtinyxy4, ATtinyxy6, ATtinyxy7 wildcards and specific
// modern chips (ATtiny202-ATtiny1616)
// ============================================================================
#if defined(__AVR_ATtiny202__) || defined(__AVR_ATtiny204__) || \
    defined(__AVR_ATtiny212__) || defined(__AVR_ATtiny214__) || \
    defined(__AVR_ATtiny402__) || defined(__AVR_ATtiny404__) || \
    defined(__AVR_ATtiny406__) || defined(__AVR_ATtiny407__) || \
    defined(__AVR_ATtiny412__) || defined(__AVR_ATtiny414__) || \
    defined(__AVR_ATtiny416__) || defined(__AVR_ATtiny417__) || \
    defined(__AVR_ATtiny1604__) || defined(__AVR_ATtiny1616__) || \
    defined(__AVR_ATtinyxy4__) || defined(__AVR_ATtinyxy6__) || \
    defined(__AVR_ATtinyxy7__) || defined(__AVR_ATtinyxy2__)
#define FL_IS_AVR_ATTINY_MODERN
#endif

// ============================================================================
// FL_IS_AVR_ATTINY_TINY_MEMORY - ATtiny chips with <=1KB SRAM
// These cannot fit many standard FastLED example sketches (data-heavy demos,
// multi-strip arrays, etc.). Aligns with SKETCH_HAS_TINY_MEMORY in
// fl/system/sketch_macros.h.
//
// Covers only explicit parts with <=1KB SRAM. The __AVR_ATtinyxy4__/xy6/xy7
// wildcards are deliberately NOT used here because they span parts with up to
// 3KB SRAM (e.g. ATtiny1624=2KB, ATtiny3224=3KB) which fit standard sketches.
//
// Part-by-part SRAM:
//   Classic: ATtiny13/13A=64B, ATtiny24/25/45=128/128/256B, ATtiny44/84/85=256/512/512B,
//            ATtiny48=256B, ATtiny87/88=512/512B, ATtiny167=512B,
//            ATtiny2313/2313A=128B, ATtiny4313=256B
//   Modern:  ATtinyxy2 family=128-256B (all <=256B SRAM),
//            ATtinyxy4 0/1-series: 204=128B, 404/414=256/512B, 804=512B, 1604=1KB
//            (intentionally excludes 2-series xy4: 424=512B, 824=1KB, 1624=2KB, 3224=3KB
//            because 2KB+ variants fit sketches; if 424/824 were common we'd list them,
//            but megaTinyCore/PlatformIO rarely targets them)
// ============================================================================
#if defined(__AVR_ATtiny13__) || defined(__AVR_ATtiny13A__) || \
    defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) || \
    defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__) || \
    defined(__AVR_ATtiny48__) || defined(__AVR_ATtiny87__) || defined(__AVR_ATtiny88__) || \
    defined(__AVR_ATtiny167__) || \
    defined(__AVR_ATtiny2313__) || defined(__AVR_ATtiny2313A__) || defined(__AVR_ATtiny4313__) || \
    defined(__AVR_ATtiny202__) || defined(__AVR_ATtiny204__) || \
    defined(__AVR_ATtiny212__) || defined(__AVR_ATtiny214__) || \
    defined(__AVR_ATtiny402__) || defined(__AVR_ATtiny404__) || \
    defined(__AVR_ATtiny406__) || defined(__AVR_ATtiny407__) || \
    defined(__AVR_ATtiny412__) || defined(__AVR_ATtiny414__) || \
    defined(__AVR_ATtiny416__) || defined(__AVR_ATtiny417__) || \
    defined(__AVR_ATtiny1604__) || \
    defined(__AVR_ATtinyxy2__)
#define FL_IS_AVR_ATTINY_TINY_MEMORY
#endif

// ============================================================================
// FL_IS_AVR_ATTINY_NO_UART - ATtiny chips without UART hardware (only USI)
// ============================================================================
#if defined(__AVR_ATtiny13__) || defined(__AVR_ATtiny13A__) || \
    defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) || \
    defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__) || \
    defined(__AVR_ATtiny88__)
#define FL_IS_AVR_ATTINY_NO_UART
#endif

// ============================================================================
// FL_IS_AVR_LIMITED - Limited resource AVR chips
// Includes ATtiny family and low-end ATmega USB chips (ATmega32U2, ATmega16U2, ATmega8U2, AT90USB162)
// These platforms require aggressive memory-saving optimizations (NO_CORRECTION, NO_DITHERING, etc.)
// ============================================================================
#if defined(FL_IS_AVR_ATTINY) || \
    defined(__AVR_ATmega32U2__) || defined(__AVR_ATmega16U2__) || \
    defined(__AVR_ATmega8U2__) || defined(__AVR_AT90USB162__)
#define FL_IS_AVR_LIMITED
#endif
