// IWYU pragma: private

#ifndef __INC_CLOCKLESS_ARM_SAM_H
#define __INC_CLOCKLESS_ARM_SAM_H

#include "platforms/arm/sam/is_sam.h"

// SAM/Due platform: Set this FIRST before any includes to prevent generic controller alias
#if defined(FL_IS_SAM)
#define FL_CLOCKLESS_CONTROLLER_DEFINED 1
#endif

#include "fl/chipsets/timing_traits.h"
#include "fastled_delay.h"
#include "fl/stl/compiler_control.h"
#include "fl/stl/noexcept.h"

FL_DISABLE_WARNING_PUSH
FL_DISABLE_WARNING_DEPRECATED_REGISTER
namespace fl {
// Definition for a single channel clockless controller for the sam family of arm chips, like that used in the due and rfduino
// See clockless.h for detailed info on how the template parameters are used.

#if defined(FL_IS_SAM)

template <int DATA_PIN, typename TIMING, EOrder RGB_ORDER = RGB, int XTRA0 = 0, bool FLIP = false, int WAIT_TIME = 280>
class ClocklessSAMHardware : public CPixelLEDController<RGB_ORDER> {
	// Extract timing values from ChipsetTiming struct and convert from nanoseconds to clock cycles
	// Formula: cycles = (nanoseconds * CPU_MHz + 500) / 1000
	// The +500 provides rounding to nearest integer
	// SAM Due uses hardware timer at F_CPU (84MHz)
	static constexpr u32 T1 = (TIMING::T1 * (F_CPU / 1000000UL) + 500) / 1000;
	static constexpr u32 T2 = (TIMING::T2 * (F_CPU / 1000000UL) + 500) / 1000;
	static constexpr u32 T3 = (TIMING::T3 * (F_CPU / 1000000UL) + 500) / 1000;
	#define TADJUST 0
	#define TOTAL ( (T1+TADJUST) + (T2+TADJUST) + (T3+TADJUST) )
	typedef typename FastPinBB<DATA_PIN>::port_ptr_t data_ptr_t;
	typedef typename FastPinBB<DATA_PIN>::port_t data_t;

	data_t mPinMask;
	data_ptr_t mPort;
	CMinWait<WAIT_TIME> mWait;

public:
	virtual void init() FL_NOEXCEPT {
		FastPinBB<DATA_PIN>::setOutput();
		mPinMask = FastPinBB<DATA_PIN>::mask();
		mPort = FastPinBB<DATA_PIN>::port();
	}

	virtual u16 getMaxRefreshRate() const { return 400; }

protected:
    virtual void showPixels(PixelController<RGB_ORDER> & pixels) FL_NOEXCEPT {
        mWait.wait();
        if(!showRGBInternal(pixels)) {
            sei(); delayMicroseconds(WAIT_TIME); cli();
            showRGBInternal(pixels);
        }
        mWait.mark();
    }

	template<int BITS>  __attribute__ ((always_inline)) inline static void writeBits(FASTLED_REGISTER u32 & next_mark, FASTLED_REGISTER data_ptr_t port, FASTLED_REGISTER u8 & b) FL_NOEXCEPT {
		// Make sure we don't slot into a wrapping spot, this will delay up to 12.5µs for WS2812
		// bool bShift=0;
		// while(VAL < (TOTAL*10)) { bShift=true; }
		// if(bShift) { next_mark = (VAL-TOTAL); };

		for(FASTLED_REGISTER u32 i = BITS; i > 0; --i) {
			// wait to start the bit, then set the pin high
			while(DUE_TIMER_VAL < next_mark);
			next_mark = (DUE_TIMER_VAL+TOTAL);
			*port = 1;

			// how long we want to wait next depends on whether or not our bit is set to 1 or 0
			if(b&0x80) {
				// we're a 1, wait until there's less than T3 clocks left
				while((next_mark - DUE_TIMER_VAL) > (T3));
			} else {
				// we're a 0, wait until there's less than (T2+T3+slop) clocks left in this bit
				while((next_mark - DUE_TIMER_VAL) > (T2+T3+6+TADJUST+TADJUST));
			}
			*port=0;
			b <<= 1;
		}
	}

#define FORCE_REFERENCE(var)  asm volatile( "" : : "r" (var) )
	// This method is made static to force making register Y available to use for data on AVR - if the method is non-static, then
	// gcc will use register Y for the this pointer.
	static u32 showRGBInternal(PixelController<RGB_ORDER> pixels) FL_NOEXCEPT {
		// Setup and start the clock
		TC_Configure(DUE_TIMER,DUE_TIMER_CHANNEL,TC_CMR_TCCLKS_TIMER_CLOCK1) FL_NOEXCEPT;
		pmc_enable_periph_clk(DUE_TIMER_ID);
		TC_Start(DUE_TIMER,DUE_TIMER_CHANNEL) FL_NOEXCEPT;

		FASTLED_REGISTER data_ptr_t port asm("r7") FL_NOEXCEPT = FastPinBB<DATA_PIN>::port(); FORCE_REFERENCE(port);
		*port = 0;

		// Setup the pixel controller and load/scale the first byte
		pixels.preStepFirstByteDithering();
		u8 b = pixels.loadAndScale0();

		u32 next_mark = (DUE_TIMER_VAL + (TOTAL));
		while(pixels.has(1)) {
			pixels.stepDithering();

			#if (FASTLED_ALLOW_INTERRUPTS == 1)
			cli();
			if(DUE_TIMER_VAL > next_mark) {
				if((DUE_TIMER_VAL - next_mark) > ((WAIT_TIME-INTERRUPT_THRESHOLD)*CLKS_PER_US)) {
                    sei(); TC_Stop(DUE_TIMER,DUE_TIMER_CHANNEL); return 0;
                }
			}
			#endif

			writeBits<8+XTRA0>(next_mark, port, b);

			b = pixels.loadAndScale1();
			writeBits<8+XTRA0>(next_mark, port,b);

			b = pixels.loadAndScale2();
			writeBits<8+XTRA0>(next_mark, port,b);

			b = pixels.advanceAndLoadAndScale0();
			#if (FASTLED_ALLOW_INTERRUPTS == 1)
			sei();
			#endif
		};

		TC_Stop(DUE_TIMER,DUE_TIMER_CHANNEL) FL_NOEXCEPT;
		return DUE_TIMER_VAL;
	}
};

// Make ClocklessSAMHardware the default ClocklessController for SAM platforms
template <int DATA_PIN, typename TIMING, EOrder RGB_ORDER = RGB, int XTRA0 = 0, bool FLIP = false, int WAIT_TIME = 0>
using ClocklessController = ClocklessSAMHardware<DATA_PIN, TIMING, RGB_ORDER, XTRA0, FLIP, WAIT_TIME>;

#endif  // defined(FL_IS_SAM)

}  // namespace fl

FL_DISABLE_WARNING_POP

#endif  // __INC_CLOCKLESS_ARM_SAM_H
