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PU2CLR SI470X Arduino Library
1.0.1
Arduino Library for Si470X Devices - By Ricardo Lima Caratti
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#include <Arduino.h>
#include <Wire.h>
Go to the source code of this file.
Macros | |
#define | MAX_DELAY_AFTER_OSCILLATOR 500 |
#define | I2C_DEVICE_ADDR 0x10 |
#define | OSCILLATOR_TYPE_CRYSTAL 1 |
#define | OSCILLATOR_TYPE_REFCLK 0 |
#define | RDS_STANDARD 0 |
RDS Mode. More... | |
#define | RDS_VERBOSE 1 |
RDS Mode. More... | |
#define | SI470X_SEEK_DOWN 0 |
Seek Down Direction. More... | |
#define | SI470X_SEEK_UP 1 |
Seek Up Direction. More... | |
#define | SI470X_SEEK_WRAP 0 |
#define | SI470X_SEEK_STOP 1 |
#define | FM_BAND_USA_EU 0 |
87.5–108 MHz (US / Europe, Default) More... | |
#define | FM_BAND_JAPAN_WIDE 1 |
76–108 MHz (Japan wide band) More... | |
#define | FM_BAND_JAPAN 2 |
76–90 MHz (Japan) More... | |
#define | FM_BAND_RESERVED 3 |
Reserved. More... | |
#define | REG00 0x00 |
#define | REG01 0x01 |
#define | REG02 0x02 |
#define | REG03 0x03 |
#define | REG04 0x04 |
#define | REG05 0x05 |
#define | REG06 0x06 |
#define | REG07 0x07 |
#define | REG08 0x08 |
#define | REG09 0x09 |
#define | REG0A 0x0A |
#define | REG0B 0x0B |
#define | REG0C 0x0C |
#define | REG0D 0x0D |
#define | REG0E 0x0E |
#define | REG0F 0x0F |
Typedefs | |
typedef uint16_t | si470x_reg0c |
RDS Block A. More... | |
typedef uint16_t | si470x_reg0d |
RDS Block B. More... | |
typedef uint16_t | si470x_reg0e |
RDS Block C. More... | |
typedef uint16_t | si470x_reg0f |
RDS Block D. More... | |
#define MAX_DELAY_AFTER_OSCILLATOR 500 |
#define I2C_DEVICE_ADDR 0x10 |
#define OSCILLATOR_TYPE_CRYSTAL 1 |
#define OSCILLATOR_TYPE_REFCLK 0 |
#define RDS_STANDARD 0 |
RDS Mode.
#define RDS_VERBOSE 1 |
RDS Mode.
#define SI470X_SEEK_DOWN 0 |
Seek Down Direction.
#define SI470X_SEEK_UP 1 |
Seek Up Direction.
#define SI470X_SEEK_WRAP 0 |
#define SI470X_SEEK_STOP 1 |
#define FM_BAND_USA_EU 0 |
87.5–108 MHz (US / Europe, Default)
#define FM_BAND_JAPAN_WIDE 1 |
76–108 MHz (Japan wide band)
#define FM_BAND_JAPAN 2 |
76–90 MHz (Japan)
#define FM_BAND_RESERVED 3 |
Reserved.
#define REG00 0x00 |
#define REG01 0x01 |
#define REG02 0x02 |
#define REG03 0x03 |
#define REG04 0x04 |
#define REG05 0x05 |
#define REG06 0x06 |
#define REG07 0x07 |
#define REG08 0x08 |
#define REG09 0x09 |
#define REG0A 0x0A |
#define REG0B 0x0B |
#define REG0C 0x0C |
#define REG0D 0x0D |
#define REG0E 0x0E |
#define REG0F 0x0F |