31 #if defined(CONFIG_SOFTWARE_I2C_AVAILABLE) && defined(CONFIG_SOFTWARE_I2C_ENABLE) 43 #if defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__) 46 #define PORT_REG PORTB 47 #elif defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) 51 #define PORT_REG PORTA 55 #define PORT_REG PORTC 60 #warning "F_CPU is not defined, there can be I2C issues" 63 #define CPU_CYCLE_NS (1000000000/F_CPU) 66 #define DELAY_LOOP_CYCLES 4 67 #define ssd1306_delay(x) for(uint8_t i2=x; i2>0; i2--){__asm__("nop\n\t");} 72 #define SSD1306_I2C_START_STOP_DELAY 600 73 #define SSD1306_I2C_RISE_TIME 300 74 #define SSD1306_I2C_FALL_TIME 300 75 #define SSD1306_I2C_DATA_HOLD_TIME 300 76 #define SSD1306_I2C_IDLE_TIME 1300 77 #define SSD1306_I2C_CLOCK 2500 80 #define I2C_START_STOP_DELAY ((SSD1306_I2C_START_STOP_DELAY/CPU_CYCLE_NS + DELAY_LOOP_CYCLES/2)/DELAY_LOOP_CYCLES) 82 #define I2C_RISE_TIME ((SSD1306_I2C_RISE_TIME/CPU_CYCLE_NS)/DELAY_LOOP_CYCLES) 84 #define I2C_DATA_HOLD_TIME ((SSD1306_I2C_DATA_HOLD_TIME/CPU_CYCLE_NS + DELAY_LOOP_CYCLES/2)/DELAY_LOOP_CYCLES) 86 #define I2C_IDLE_TIME (((SSD1306_I2C_IDLE_TIME/CPU_CYCLE_NS) + DELAY_LOOP_CYCLES/2)/DELAY_LOOP_CYCLES) 88 #define I2C_HALF_CLOCK (((SSD1306_I2C_CLOCK - SSD1306_I2C_FALL_TIME - SSD1306_I2C_RISE_TIME - SSD1306_I2C_FALL_TIME)/CPU_CYCLE_NS/2 \ 94 #define DIGITAL_WRITE_HIGH(DREG, PREG, BIT) { DREG &= ~BIT; PREG |= BIT; } 98 #define DIGITAL_WRITE_LOW(DREG, PREG, BIT) { DREG |= BIT; PREG &= ~BIT; } 100 static uint8_t oldSREG;
101 static uint8_t interruptsOff = 0;
107 static void ssd1306_i2cSendByte_Embedded(uint8_t data)
113 DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_sda)
115 DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_sda);
117 ssd1306_delay(I2C_RISE_TIME);
119 DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_scl);
120 ssd1306_delay(I2C_HALF_CLOCK);
122 DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_scl);
123 ssd1306_delay(I2C_HALF_CLOCK);
126 DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_sda);
127 ssd1306_delay(I2C_RISE_TIME);
128 DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_scl);
129 ssd1306_delay(I2C_HALF_CLOCK);
130 DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_scl);
131 ssd1306_delay(I2C_HALF_CLOCK);
134 static void ssd1306_i2cSendBytes_Embedded(
const uint8_t *buffer, uint16_t size)
138 ssd1306_i2cSendByte_Embedded(*buffer);
146 static void ssd1306_i2cStart_Embedded(
void)
151 DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_sda);
152 ssd1306_delay(I2C_START_STOP_DELAY);
153 DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_scl);
154 ssd1306_delay(I2C_HALF_CLOCK);
155 ssd1306_i2cSendByte_Embedded((s_sa << 1) | 0);
158 static void ssd1306_i2cStop_Embedded(
void)
160 DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_sda);
161 ssd1306_delay(I2C_RISE_TIME);
162 DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_scl);
163 ssd1306_delay(I2C_START_STOP_DELAY);
164 DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_sda);
165 ssd1306_delay(I2C_IDLE_TIME);
173 static void ssd1306_i2cClose_Embedded()
179 if (scl>=0) s_scl = (1<<scl);
180 if (sda>=0) s_sda = (1<<sda);
void(* send)(uint8_t data)
#define SSD1306_SDA
SDA, Pin 4 on SSD1306 Board.
void(* close)(void)
deinitializes internal resources, allocated for interface.
ssd1306_interface_t ssd1306_intf
#define SSD1306_SCL
SCL, Pin 3 on SSD1306 Board.
void ssd1306_i2cInit_Embedded(int8_t scl, int8_t sda, uint8_t sa)
void(* send_buffer)(const uint8_t *buffer, uint16_t size)
Sends bytes to SSD1306 device.