33 #ifdef SSD1306_I2C_SW_SUPPORTED 45 #if defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__) 48 #define PORT_REG PORTB 52 #define PORT_REG PORTC 57 #warning "F_CPU is not defined, there can be I2C issues" 60 #define CPU_CYCLE_NS (1000000000/F_CPU) 63 #define DELAY_LOOP_CYCLES 4 64 #define ssd1306_delay(x) for(uint8_t i2=x; i2>0; i2--){__asm__("nop\n\t");} 69 #define SSD1306_I2C_START_STOP_DELAY 600 70 #define SSD1306_I2C_RISE_TIME 300 71 #define SSD1306_I2C_FALL_TIME 300 72 #define SSD1306_I2C_DATA_HOLD_TIME 300 73 #define SSD1306_I2C_IDLE_TIME 1300 74 #define SSD1306_I2C_CLOCK 2500 77 #define I2C_START_STOP_DELAY ((SSD1306_I2C_START_STOP_DELAY/CPU_CYCLE_NS + DELAY_LOOP_CYCLES/2)/DELAY_LOOP_CYCLES) 79 #define I2C_RISE_TIME ((SSD1306_I2C_RISE_TIME/CPU_CYCLE_NS)/DELAY_LOOP_CYCLES) 81 #define I2C_DATA_HOLD_TIME ((SSD1306_I2C_DATA_HOLD_TIME/CPU_CYCLE_NS + DELAY_LOOP_CYCLES/2)/DELAY_LOOP_CYCLES) 83 #define I2C_IDLE_TIME (((SSD1306_I2C_IDLE_TIME/CPU_CYCLE_NS) + DELAY_LOOP_CYCLES/2)/DELAY_LOOP_CYCLES) 85 #define I2C_HALF_CLOCK (((SSD1306_I2C_CLOCK - SSD1306_I2C_FALL_TIME - SSD1306_I2C_RISE_TIME - SSD1306_I2C_FALL_TIME)/CPU_CYCLE_NS/2 \ 91 #define DIGITAL_WRITE_HIGH(DREG, PREG, BIT) { DREG &= ~BIT; PREG |= BIT; } 95 #define DIGITAL_WRITE_LOW(DREG, PREG, BIT) { DREG |= BIT; PREG &= ~BIT; } 97 static uint8_t oldSREG;
98 static uint8_t interruptsOff = 0;
108 DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_sda);
109 ssd1306_delay(I2C_START_STOP_DELAY);
110 DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_scl);
111 ssd1306_delay(I2C_HALF_CLOCK);
117 DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_sda);
118 ssd1306_delay(I2C_RISE_TIME);
119 DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_scl);
120 ssd1306_delay(I2C_START_STOP_DELAY);
121 DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_sda);
122 ssd1306_delay(I2C_IDLE_TIME);
140 DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_sda)
142 DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_sda);
144 ssd1306_delay(I2C_RISE_TIME);
146 DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_scl);
147 ssd1306_delay(I2C_HALF_CLOCK);
149 DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_scl);
150 ssd1306_delay(I2C_HALF_CLOCK);
153 DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_sda);
154 ssd1306_delay(I2C_RISE_TIME);
155 DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_scl);
156 ssd1306_delay(I2C_HALF_CLOCK);
157 DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_scl);
158 ssd1306_delay(I2C_HALF_CLOCK);
163 if (scl>=0) s_scl = (1<<scl);
164 if (sda>=0) s_sda = (1<<sda);
void ssd1306_i2cInit_Embedded(int8_t scl, int8_t sda, uint8_t sa)
void(* ssd1306_sendByte)(uint8_t data)
void ssd1306_i2cStart_Embedded(void)
void(* ssd1306_dataStart)()
void(* ssd1306_endTransmission)()
#define SSD1306_SCL
SCL, Pin 3 on SSD1306 Board.
void ssd1306_i2cSendByte_Embedded(uint8_t data)
void ssd1306_i2cStop_Embedded(void)
void ssd1306_i2cCommandStart()
void ssd1306_i2cDataStart()
void(* ssd1306_startTransmission)()
#define SSD1306_SDA
SDA, Pin 4 on SSD1306 Board.
void(* ssd1306_commandStart)()