SSD1306 OLED display driver  1.4.0
This library is developed to control SSD1306 i2c/spi OLED display
ssd1306_i2c_embedded.c
1 /*
2  MIT License
3 
4  Copyright (c) 2016-2018, Alexey Dynda
5 
6  Permission is hereby granted, free of charge, to any person obtaining a copy
7  of this software and associated documentation files (the "Software"), to deal
8  in the Software without restriction, including without limitation the rights
9  to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  copies of the Software, and to permit persons to whom the Software is
11  furnished to do so, subject to the following conditions:
12 
13  The above copyright notice and this permission notice shall be included in all
14  copies or substantial portions of the Software.
15 
16  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22  SOFTWARE.
23 */
24 
25 
26 #include "ssd1306_i2c_embedded.h"
27 #include "intf/ssd1306_interface.h"
28 #include "ssd1306_i2c_conf.h"
29 #include "ssd1306_i2c.h"
30 
31 #include "hal/io.h"
32 
33 #ifdef SSD1306_I2C_SW_SUPPORTED
34 
41 static uint8_t s_scl = (1<<SSD1306_SCL);
42 static uint8_t s_sda = (1<<SSD1306_SDA);
43 static uint8_t s_sa = SSD1306_SA;
44 
45 #if defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__)
46  // at 8Mhz each command takes ~ 0.125us
47  #define DDR_REG DDRB
48  #define PORT_REG PORTB
49 #else // For Atmega
50  // at 16Mhz each command takes ~ 0.0625us
51  #define DDR_REG DDRC
52  #define PORT_REG PORTC
53 #endif
54 
55 
56 #ifndef F_CPU
57  #warning "F_CPU is not defined, there can be I2C issues"
58  #define F_CPU 8000000
59 #endif
60 #define CPU_CYCLE_NS (1000000000/F_CPU)
61 
62 // each delay loop takes 4 cycles: nop(1), dec(1), jnz(2)
63 #define DELAY_LOOP_CYCLES 4
64 #define ssd1306_delay(x) for(uint8_t i2=x; i2>0; i2--){__asm__("nop\n\t");}
65 
69 #define SSD1306_I2C_START_STOP_DELAY 600
70 #define SSD1306_I2C_RISE_TIME 300
71 #define SSD1306_I2C_FALL_TIME 300
72 #define SSD1306_I2C_DATA_HOLD_TIME 300
73 #define SSD1306_I2C_IDLE_TIME 1300
74 #define SSD1306_I2C_CLOCK 2500
75 
76 
77 #define I2C_START_STOP_DELAY ((SSD1306_I2C_START_STOP_DELAY/CPU_CYCLE_NS + DELAY_LOOP_CYCLES/2)/DELAY_LOOP_CYCLES)
78 
79 #define I2C_RISE_TIME ((SSD1306_I2C_RISE_TIME/CPU_CYCLE_NS)/DELAY_LOOP_CYCLES)
80 
81 #define I2C_DATA_HOLD_TIME ((SSD1306_I2C_DATA_HOLD_TIME/CPU_CYCLE_NS + DELAY_LOOP_CYCLES/2)/DELAY_LOOP_CYCLES)
82 
83 #define I2C_IDLE_TIME (((SSD1306_I2C_IDLE_TIME/CPU_CYCLE_NS) + DELAY_LOOP_CYCLES/2)/DELAY_LOOP_CYCLES)
84 
85 #define I2C_HALF_CLOCK (((SSD1306_I2C_CLOCK - SSD1306_I2C_FALL_TIME - SSD1306_I2C_RISE_TIME - SSD1306_I2C_FALL_TIME)/CPU_CYCLE_NS/2 \
86  )/DELAY_LOOP_CYCLES)
87 
88 
89 /* I2C HIGH = PORT as INPUT(0) and PULL-UP ENABLE (1) */
90 //#define DIGITAL_WRITE_HIGH(DREG, PREG, BIT) { DREG &= ~(1 << BIT); PREG |= (1 << BIT); }
91 #define DIGITAL_WRITE_HIGH(DREG, PREG, BIT) { DREG &= ~BIT; PREG |= BIT; }
92 
93 /* I2C LOW = PORT as OUTPUT(1) and OUTPUT LOW (0) */
94 //#define DIGITAL_WRITE_LOW(DREG, PREG, BIT) { DREG |= (1 << BIT); PREG &= ~(1 << BIT); }
95 #define DIGITAL_WRITE_LOW(DREG, PREG, BIT) { DREG |= BIT; PREG &= ~BIT; }
96 
97 static uint8_t oldSREG;
98 static uint8_t interruptsOff = 0;
99 
104 {
105  oldSREG = SREG;
106  cli();
107  interruptsOff = 1;
108  DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_sda); // Set to LOW
109  ssd1306_delay(I2C_START_STOP_DELAY);
110  DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_scl); // Set to LOW
111  ssd1306_delay(I2C_HALF_CLOCK);
112  ssd1306_i2cSendByte_Embedded((s_sa << 1) | 0);
113 }
114 
116 {
117  DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_sda); // Set to LOW
118  ssd1306_delay(I2C_RISE_TIME); // Fall time is the same as rise time
119  DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_scl); // Set to HIGH
120  ssd1306_delay(I2C_START_STOP_DELAY);
121  DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_sda); // Set to HIGH
122  ssd1306_delay(I2C_IDLE_TIME);
123  if (interruptsOff)
124  {
125  SREG = oldSREG;
126  interruptsOff = 0;
127  }
128 }
129 
135 {
136  uint8_t i;
137  for(i=8; i>0; i--)
138  {
139  if(data & 0x80)
140  DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_sda)
141  else
142  DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_sda);
143  data<<=1;
144  ssd1306_delay(I2C_RISE_TIME); // Fall time is the same as rise time
145 
146  DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_scl);
147  ssd1306_delay(I2C_HALF_CLOCK);
148 
149  DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_scl);
150  ssd1306_delay(I2C_HALF_CLOCK);
151  }
152  // generating confirmation impulse
153  DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_sda);
154  ssd1306_delay(I2C_RISE_TIME); // Fall time is the same as rise time
155  DIGITAL_WRITE_HIGH(DDR_REG, PORT_REG, s_scl);
156  ssd1306_delay(I2C_HALF_CLOCK);
157  DIGITAL_WRITE_LOW(DDR_REG, PORT_REG, s_scl);
158  ssd1306_delay(I2C_HALF_CLOCK);
159 }
160 
161 void ssd1306_i2cInit_Embedded(int8_t scl, int8_t sda, uint8_t sa)
162 {
163  if (scl>=0) s_scl = (1<<scl);
164  if (sda>=0) s_sda = (1<<sda);
165  if (sa) s_sa = sa;
171 }
172 
173 #endif
void ssd1306_i2cInit_Embedded(int8_t scl, int8_t sda, uint8_t sa)
void(* ssd1306_sendByte)(uint8_t data)
void ssd1306_i2cStart_Embedded(void)
void(* ssd1306_dataStart)()
void(* ssd1306_endTransmission)()
#define SSD1306_SCL
SCL, Pin 3 on SSD1306 Board.
void ssd1306_i2cSendByte_Embedded(uint8_t data)
void ssd1306_i2cStop_Embedded(void)
void ssd1306_i2cCommandStart()
void ssd1306_i2cDataStart()
void(* ssd1306_startTransmission)()
#define SSD1306_SDA
SDA, Pin 4 on SSD1306 Board.
void(* ssd1306_commandStart)()
#define SSD1306_SA