FabGL
ESP32 VGA Controller and Graphics Library
ps2controller.cpp File Reference
#include <strings.h>
#include "freertos/FreeRTOS.h"
#include "esp32/ulp.h"
#include "driver/rtc_io.h"
#include "soc/sens_reg.h"
#include "ps2controller.h"
#include "utils.h"

Namespaces

 fabgl
 

Macros

#define ALU_SEL_STAGE_INC   0
 
#define ALU_SEL_STAGE_DEC   1
 
#define ALU_SEL_STAGE_RST   2
 
#define SUB_OPCODE_STAGEB   2
 
#define I_STAGEINCI(imm_)
 
#define I_STAGEDECI(imm_)
 
#define I_STAGERSTI()
 
#define I_STAGEBL(pc_offset, imm_value)
 
#define I_STAGEBLE(pc_offset, imm_value)
 
#define I_STAGEBGE(pc_offset, imm_value)
 
#define M_STAGEBL(label_num, imm_value)
 
#define M_STAGEBGE(label_num, imm_value)
 
#define M_STAGEBLE(label_num, imm_value)
 
#define OPCODE_PLACEHOLDER   12
 
#define SUB_OPCODE_DAT_ENABLE_OUTPUT   0
 
#define SUB_OPCODE_DAT_ENABLE_INPUT   1
 
#define SUB_OPCODE_CLK_ENABLE_OUTPUT   2
 
#define SUB_OPCODE_CLK_ENABLE_INPUT   3
 
#define SUB_OPCODE_READ_CLK   4
 
#define SUB_OPCODE_READ_DAT   5
 
#define SUB_OPCODE_WRITE_CLK   6
 
#define SUB_OPCODE_WRITE_DAT   7
 
#define DAT_ENABLE_OUTPUT(value)
 
#define DAT_ENABLE_INPUT(value)
 
#define CLK_ENABLE_OUTPUT(value)
 
#define CLK_ENABLE_INPUT(value)
 
#define READ_CLK()
 
#define READ_DAT()
 
#define WRITE_CLK(value)
 
#define WRITE_DAT(value)
 
#define CONFIGURE_DAT_INPUT()
 
#define CONFIGURE_DAT_OUTPUT()
 
#define CONFIGURE_CLK_INPUT()
 
#define CONFIGURE_CLK_OUTPUT()
 
#define WRITE_DAT_R0()
 
#define RTC_MEM_PROG_START   0x000
 
#define RTC_MEM_MODE   0x400
 
#define RTC_MEM_SEND_WORD   0x401
 
#define RTC_MEM_WRITE_POS   0x402
 
#define RTC_MEM_WORD_SENT_FLAG   0x403
 
#define RTC_MEM_WORD_RECEIVED_FLAG   0x404
 
#define RTC_MEM_BUFFER_BTM   0x405
 
#define RTC_MEM_BUFFER_TOP   0x800
 
#define MODE_RECEIVE   0
 
#define MODE_SEND   1
 
#define READY_TO_RECEIVE   0
 
#define RECEIVE_NEXT_WORD   1
 
#define RECEIVE_NEXT_BIT   2
 
#define RECEIVE_WAIT_FOR_CLK_HIGH   3
 
#define RECEIVE_WORD_READY   4
 
#define SEND_WORD   5
 
#define SEND_NEXT_BIT   6
 
#define SEND_WAIT_FOR_CLK_HIGH   7
 

Functions

void fabgl::replace_placeholders (uint32_t prg_start, int size, gpio_num_t clkGPIO, gpio_num_t datGPIO)
 

Variables

fabgl::PS2ControllerClass PS2Controller
 
const ulp_insn_t fabgl::ULPCode []
 

Macro Definition Documentation

◆ ALU_SEL_STAGE_DEC

#define ALU_SEL_STAGE_DEC   1

◆ ALU_SEL_STAGE_INC

#define ALU_SEL_STAGE_INC   0

◆ ALU_SEL_STAGE_RST

#define ALU_SEL_STAGE_RST   2

◆ CLK_ENABLE_INPUT

#define CLK_ENABLE_INPUT (   value)
Value:
{ .macro = { \
.label = value, \
.unused = 0, \
.sub_opcode = SUB_OPCODE_CLK_ENABLE_INPUT, \
.opcode = OPCODE_PLACEHOLDER } }
#define SUB_OPCODE_CLK_ENABLE_INPUT
Definition: ps2controller.cpp:133
#define OPCODE_PLACEHOLDER
Definition: ps2controller.cpp:129

◆ CLK_ENABLE_OUTPUT

#define CLK_ENABLE_OUTPUT (   value)
Value:
{ .macro = { \
.label = value, \
.unused = 0, \
.opcode = OPCODE_PLACEHOLDER } }
#define SUB_OPCODE_CLK_ENABLE_OUTPUT
Definition: ps2controller.cpp:132
#define OPCODE_PLACEHOLDER
Definition: ps2controller.cpp:129

◆ CONFIGURE_CLK_INPUT

#define CONFIGURE_CLK_INPUT ( )
Value:
CLK_ENABLE_INPUT(1)
#define CLK_ENABLE_OUTPUT(value)
Definition: ps2controller.cpp:152

◆ CONFIGURE_CLK_OUTPUT

#define CONFIGURE_CLK_OUTPUT ( )
Value:
CLK_ENABLE_INPUT(0)
#define CLK_ENABLE_OUTPUT(value)
Definition: ps2controller.cpp:152

◆ CONFIGURE_DAT_INPUT

#define CONFIGURE_DAT_INPUT ( )
Value:
DAT_ENABLE_INPUT(1)
#define DAT_ENABLE_OUTPUT(value)
Definition: ps2controller.cpp:140

◆ CONFIGURE_DAT_OUTPUT

#define CONFIGURE_DAT_OUTPUT ( )
Value:
DAT_ENABLE_INPUT(0)
#define DAT_ENABLE_OUTPUT(value)
Definition: ps2controller.cpp:140

◆ DAT_ENABLE_INPUT

#define DAT_ENABLE_INPUT (   value)
Value:
{ .macro = { \
.label = value, \
.unused = 0, \
.sub_opcode = SUB_OPCODE_DAT_ENABLE_INPUT, \
.opcode = OPCODE_PLACEHOLDER } }
#define SUB_OPCODE_DAT_ENABLE_INPUT
Definition: ps2controller.cpp:131
#define OPCODE_PLACEHOLDER
Definition: ps2controller.cpp:129

◆ DAT_ENABLE_OUTPUT

#define DAT_ENABLE_OUTPUT (   value)
Value:
{ .macro = { \
.label = value, \
.unused = 0, \
.opcode = OPCODE_PLACEHOLDER } }
#define OPCODE_PLACEHOLDER
Definition: ps2controller.cpp:129
#define SUB_OPCODE_DAT_ENABLE_OUTPUT
Definition: ps2controller.cpp:130

◆ I_STAGEBGE

#define I_STAGEBGE (   pc_offset,
  imm_value 
)
Value:
{ .b = { \
.imm = 0x8000 | imm_value, \
.cmp = 0, \
.offset = abs(pc_offset), \
.sign = (pc_offset >= 0) ? 0 : 1, \
.sub_opcode = SUB_OPCODE_STAGEB, \
.opcode = OPCODE_BRANCH } }
#define SUB_OPCODE_STAGEB
Definition: ps2controller.cpp:49

◆ I_STAGEBL

#define I_STAGEBL (   pc_offset,
  imm_value 
)
Value:
{ .b = { \
.imm = imm_value, \
.cmp = 0, \
.offset = abs(pc_offset), \
.sign = (pc_offset >= 0) ? 0 : 1, \
.sub_opcode = SUB_OPCODE_STAGEB, \
.opcode = OPCODE_BRANCH } }
#define SUB_OPCODE_STAGEB
Definition: ps2controller.cpp:49

◆ I_STAGEBLE

#define I_STAGEBLE (   pc_offset,
  imm_value 
)
Value:
{ .b = { \
.imm = imm_value, \
.cmp = 1, \
.offset = abs(pc_offset), \
.sign = (pc_offset >= 0) ? 0 : 1, \
.sub_opcode = SUB_OPCODE_STAGEB, \
.opcode = OPCODE_BRANCH } }
#define SUB_OPCODE_STAGEB
Definition: ps2controller.cpp:49

◆ I_STAGEDECI

#define I_STAGEDECI (   imm_)
Value:
{ .alu_imm = { \
.dreg = 0, \
.sreg = 0, \
.imm = imm_, \
.unused = 0, \
.sub_opcode = SUB_OPCODE_ALU_CNT, \
.opcode = OPCODE_ALU } }
#define ALU_SEL_STAGE_DEC
Definition: ps2controller.cpp:46

◆ I_STAGEINCI

#define I_STAGEINCI (   imm_)
Value:
{ .alu_imm = { \
.dreg = 0, \
.sreg = 0, \
.imm = imm_, \
.unused = 0, \
.sub_opcode = SUB_OPCODE_ALU_CNT, \
.opcode = OPCODE_ALU } }
#define ALU_SEL_STAGE_INC
Definition: ps2controller.cpp:45

◆ I_STAGERSTI

#define I_STAGERSTI ( )
Value:
{ .alu_imm = { \
.dreg = 0, \
.sreg = 0, \
.imm = 0, \
.unused = 0, \
.sub_opcode = SUB_OPCODE_ALU_CNT, \
.opcode = OPCODE_ALU } }
#define ALU_SEL_STAGE_RST
Definition: ps2controller.cpp:47

◆ M_STAGEBGE

#define M_STAGEBGE (   label_num,
  imm_value 
)
Value:
I_STAGEBL(2, imm_value), \
M_BX(label_num)
#define I_STAGEBL(pc_offset, imm_value)
Definition: ps2controller.cpp:82

◆ M_STAGEBL

#define M_STAGEBL (   label_num,
  imm_value 
)
Value:
I_STAGEBGE(2, imm_value), \
M_BX(label_num)
#define I_STAGEBGE(pc_offset, imm_value)
Definition: ps2controller.cpp:100

◆ M_STAGEBLE

#define M_STAGEBLE (   label_num,
  imm_value 
)
Value:
I_STAGEBLE(2, imm_value), \
I_STAGEBGE(2, imm_value), \
M_BX(label_num)
#define I_STAGEBLE(pc_offset, imm_value)
Definition: ps2controller.cpp:91

◆ MODE_RECEIVE

#define MODE_RECEIVE   0

◆ MODE_SEND

#define MODE_SEND   1

◆ OPCODE_PLACEHOLDER

#define OPCODE_PLACEHOLDER   12

◆ READ_CLK

#define READ_CLK ( )
Value:
{ .macro = { \
.label = 0, \
.unused = 0, \
.sub_opcode = SUB_OPCODE_READ_CLK, \
.opcode = OPCODE_PLACEHOLDER } }
#define OPCODE_PLACEHOLDER
Definition: ps2controller.cpp:129
#define SUB_OPCODE_READ_CLK
Definition: ps2controller.cpp:134

◆ READ_DAT

#define READ_DAT ( )
Value:
{ .macro = { \
.label = 0, \
.unused = 0, \
.sub_opcode = SUB_OPCODE_READ_DAT, \
.opcode = OPCODE_PLACEHOLDER } }
#define OPCODE_PLACEHOLDER
Definition: ps2controller.cpp:129
#define SUB_OPCODE_READ_DAT
Definition: ps2controller.cpp:135

◆ READY_TO_RECEIVE

#define READY_TO_RECEIVE   0

◆ RECEIVE_NEXT_BIT

#define RECEIVE_NEXT_BIT   2

◆ RECEIVE_NEXT_WORD

#define RECEIVE_NEXT_WORD   1

◆ RECEIVE_WAIT_FOR_CLK_HIGH

#define RECEIVE_WAIT_FOR_CLK_HIGH   3

◆ RECEIVE_WORD_READY

#define RECEIVE_WORD_READY   4

◆ RTC_MEM_BUFFER_BTM

#define RTC_MEM_BUFFER_BTM   0x405

◆ RTC_MEM_BUFFER_TOP

#define RTC_MEM_BUFFER_TOP   0x800

◆ RTC_MEM_MODE

#define RTC_MEM_MODE   0x400

◆ RTC_MEM_PROG_START

#define RTC_MEM_PROG_START   0x000

◆ RTC_MEM_SEND_WORD

#define RTC_MEM_SEND_WORD   0x401

◆ RTC_MEM_WORD_RECEIVED_FLAG

#define RTC_MEM_WORD_RECEIVED_FLAG   0x404

◆ RTC_MEM_WORD_SENT_FLAG

#define RTC_MEM_WORD_SENT_FLAG   0x403

◆ RTC_MEM_WRITE_POS

#define RTC_MEM_WRITE_POS   0x402

◆ SEND_NEXT_BIT

#define SEND_NEXT_BIT   6

◆ SEND_WAIT_FOR_CLK_HIGH

#define SEND_WAIT_FOR_CLK_HIGH   7

◆ SEND_WORD

#define SEND_WORD   5

◆ SUB_OPCODE_CLK_ENABLE_INPUT

#define SUB_OPCODE_CLK_ENABLE_INPUT   3

◆ SUB_OPCODE_CLK_ENABLE_OUTPUT

#define SUB_OPCODE_CLK_ENABLE_OUTPUT   2

◆ SUB_OPCODE_DAT_ENABLE_INPUT

#define SUB_OPCODE_DAT_ENABLE_INPUT   1

◆ SUB_OPCODE_DAT_ENABLE_OUTPUT

#define SUB_OPCODE_DAT_ENABLE_OUTPUT   0

◆ SUB_OPCODE_READ_CLK

#define SUB_OPCODE_READ_CLK   4

◆ SUB_OPCODE_READ_DAT

#define SUB_OPCODE_READ_DAT   5

◆ SUB_OPCODE_STAGEB

#define SUB_OPCODE_STAGEB   2

◆ SUB_OPCODE_WRITE_CLK

#define SUB_OPCODE_WRITE_CLK   6

◆ SUB_OPCODE_WRITE_DAT

#define SUB_OPCODE_WRITE_DAT   7

◆ WRITE_CLK

#define WRITE_CLK (   value)
Value:
{ .macro = { \
.label = value, \
.unused = 0, \
.sub_opcode = SUB_OPCODE_WRITE_CLK, \
.opcode = OPCODE_PLACEHOLDER } }
#define OPCODE_PLACEHOLDER
Definition: ps2controller.cpp:129
#define SUB_OPCODE_WRITE_CLK
Definition: ps2controller.cpp:136

◆ WRITE_DAT

#define WRITE_DAT (   value)
Value:
{ .macro = { \
.label = value, \
.unused = 0, \
.sub_opcode = SUB_OPCODE_WRITE_DAT, \
.opcode = OPCODE_PLACEHOLDER } }
#define OPCODE_PLACEHOLDER
Definition: ps2controller.cpp:129
#define SUB_OPCODE_WRITE_DAT
Definition: ps2controller.cpp:137

◆ WRITE_DAT_R0

#define WRITE_DAT_R0 ( )
Value:
I_BL(3, 1), \
WRITE_DAT(1), \
I_BGE(2, 1), \
WRITE_DAT(0)

Variable Documentation

◆ PS2Controller