CMSIS DSP Software Library: Convolution

Functions

# Convolution
[Filtering Functions]

## Functions
void | arm_conv_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
void | arm_conv_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
void | arm_conv_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
void | arm_conv_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
void | arm_conv_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
void | arm_conv_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)

## Detailed Description

Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector. Convolution is similar to correlation and is frequently used in filtering and data analysis. The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types. The library also provides fast versions of the Q15 and Q31 functions on Cortex-M4 and Cortex-M3.

Algorithm
  Let `a[n]` and `b[n]` be sequences of length `srcALen` and `srcBLen` samples respectively. Then the convolution

                       c[n] = a[n] * b[n]

  is defined as

  Note that `c[n]` is of length `srcALen + srcBLen - 1` and is defined over the interval `n=0, 1, 2, ..., srcALen + srcBLen - 2`. `pSrcA` points to the first input vector of length `srcALen` and `pSrcB` points to the second input vector of length `srcBLen`. The output result is written to `pDst` and the calling function must allocate `srcALen+srcBLen-1` words for the result.

  Conceptually, when two signals `a[n]` and `b[n]` are convolved, the signal `b[n]` slides over `a[n]`. For each offset `n`, the overlapping portions of a[n] and b[n] are multiplied and summed together.

  Note that convolution is a commutative operation:

                       a[n] * b[n] = b[n] * a[n].

  This means that switching the A and B arguments to the convolution functions has no effect.

Fixed-Point Behavior

  Convolution requires summing up a large number of intermediate products. As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. Refer to the function specific documentation below for further details of the particular algorithm used.

## Function Documentation

void arm_conv_f32 | ( | float32_t * | pSrcA,
|  | uint32_t | srcALen,
|  | float32_t * | pSrcB,
|  | uint32_t | srcBLen,
|  | float32_t * | pDst
| ) |  |

Convolution of floating-point sequences.

Parameters:

  [in] | *pSrcA | points to the first input sequence.
  [in] | srcALen | length of the first input sequence.
  [in] | *pSrcB | points to the second input sequence.
  [in] | srcBLen | length of the second input sequence.
  [out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.

Returns:
  none.

Definition at line 103 of file arm_conv_f32.c.

void arm_conv_q31 | ( | q31_t * | pSrcA,
|  | uint32_t | srcALen,
|  | q31_t * | pSrcB,
|  | uint32_t | srcBLen,
|  | q31_t * | pDst
| ) |  |

Convolution of Q31 sequences.

Parameters:

  [in] | *pSrcA | points to the first input sequence.
  [in] | srcALen | length of the first input sequence.
  [in] | *pSrcB | points to the second input sequence.
  [in] | srcBLen | length of the second input sequence.
  [out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.

Returns:
  none.

Scaling and Overflow Behavior:

  The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.

  See `arm_conv_fast_q31()` for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

Definition at line 71 of file arm_conv_q31.c.

void arm_conv_fast_q31 | ( | q31_t * | pSrcA,
|  | uint32_t | srcALen,
|  | q31_t * | pSrcB,
|  | uint32_t | srcBLen,
|  | q31_t * | pDst
| ) |  |

Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.

Parameters:

  [in] | *pSrcA | points to the first input sequence.
  [in] | srcALen | length of the first input sequence.
  [in] | *pSrcB | points to the second input sequence.
  [in] | srcBLen | length of the second input sequence.
  [out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.

Returns:
  none.

Scaling and Overflow Behavior:

  This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result.

  The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally.

  See `arm_conv_q31()` for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.

Definition at line 68 of file arm_conv_fast_q31.c.

void arm_conv_q15 | ( | q15_t * | pSrcA,
|  | uint32_t | srcALen,
|  | q15_t * | pSrcB,
|  | uint32_t | srcBLen,
|  | q15_t * | pDst
| ) |  |

Convolution of Q15 sequences.

Parameters:

  [in] | *pSrcA | points to the first input sequence.
  [in] | srcALen | length of the first input sequence.
  [in] | *pSrcB | points to the second input sequence.
  [in] | srcBLen | length of the second input sequence.
  [out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.

Returns:
  none.

Scaling and Overflow Behavior:

  The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.

  Refer to `arm_conv_fast_q15()` for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.

Definition at line 68 of file arm_conv_q15.c.

void arm_conv_fast_q15 | ( | q15_t * | pSrcA,
|  | uint32_t | srcALen,
|  | q15_t * | pSrcB,
|  | uint32_t | srcBLen,
|  | q15_t * | pDst
| ) |  |

Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.

Parameters:

  [in] | *pSrcA | points to the first input sequence.
  [in] | srcALen | length of the first input sequence.
  [in] | *pSrcB | points to the second input sequence.
  [in] | srcBLen | length of the second input sequence.
  [out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.

Returns:
  none.

Scaling and Overflow Behavior:

  This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.

  See `arm_conv_q15()` for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.

Definition at line 66 of file arm_conv_fast_q15.c.

void arm_conv_q7 | ( | q7_t * | pSrcA,
|  | uint32_t | srcALen,
|  | q7_t * | pSrcB,
|  | uint32_t | srcBLen,
|  | q7_t * | pDst
| ) |  |

Convolution of Q7 sequences.

Parameters:

  [in] | *pSrcA | points to the first input sequence.
  [in] | srcALen | length of the first input sequence.
  [in] | *pSrcB | points to the second input sequence.
  [in] | srcBLen | length of the second input sequence.
  [out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.

Returns:
  none.

Scaling and Overflow Behavior:

  The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as `max(srcALen, srcBLen)<131072`. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.

Definition at line 65 of file arm_conv_q7.c.

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